//
// Copyright (c) 2018 NVIDIA Corporation.
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// Neither the name of the NVIDIA Corporation nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//

//
// DO NOT EDIT - generated by simspec!
//

#ifndef ___ARSATA_H_INC_
#define ___ARSATA_H_INC_
#define NV_MOBILE_ARSATA_H_UNIT_OF_OFFSET 1B

#define NV_SATA_IPFS_CONFIG_BASE        0
#define NV_SATA_PCI_CONFIG_FPCI_BASE    4096
#define NV_SATA_EXT_CONFIG_FPCI_BASE    4352
#define NV_SATA_BAR0_FPCI_BASE  8192
#define NV_SATA_BAR1_FPCI_BASE  12288
#define NV_SATA_BAR2_FPCI_BASE  16384
#define NV_SATA_BAR3_FPCI_BASE  20480
#define NV_SATA_BAR4_FPCI_BASE  24576
#define NV_SATA_BAR5_FPCI_BASE  28672
#define NV_SATA_PCI_CONFIG_PRI_BASE     36864
#define NV_SATA_EXT_CONFIG_PRI_BASE     37120
#define NV_SATA_BAR0_PRI_BASE   41472
#define NV_SATA_BAR1_PRI_BASE   41728
#define NV_SATA_BAR2_PRI_BASE   41984
#define NV_SATA_BAR3_PRI_BASE   42240
#define NV_SATA_BAR4_PRI_BASE   42496
#define NV_SATA_BAR5_PRI_BASE   45056
#define NV_IPFS_FPCI_ACCESS_TYPE_MEM    1
#define NV_IPFS_FPCI_ACCESS_TYPE_IO     0

// Register SATA_AXI_BAR0_SZ_0
#define SATA_AXI_BAR0_SZ_0                      _MK_ADDR_CONST(0x0)
#define SATA_AXI_BAR0_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR0_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR0_SZ_0_SCR                  0
#define SATA_AXI_BAR0_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR0_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR0_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR0_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR0_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_SHIFT)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_RANGE                  19:0
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_DEFAULT                        _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_SZ_0_AXI_BAR0_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR1_SZ_0
#define SATA_AXI_BAR1_SZ_0                      _MK_ADDR_CONST(0x4)
#define SATA_AXI_BAR1_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR1_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR1_SZ_0_SCR                  0
#define SATA_AXI_BAR1_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR1_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR1_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR1_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR1_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_SHIFT)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_RANGE                  19:0
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_DEFAULT                        _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_SZ_0_AXI_BAR1_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR2_SZ_0
#define SATA_AXI_BAR2_SZ_0                      _MK_ADDR_CONST(0x8)
#define SATA_AXI_BAR2_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR2_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR2_SZ_0_SCR                  0
#define SATA_AXI_BAR2_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR2_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR2_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR2_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR2_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_SHIFT)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_RANGE                  19:0
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_DEFAULT                        _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_SZ_0_AXI_BAR2_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR3_SZ_0
#define SATA_AXI_BAR3_SZ_0                      _MK_ADDR_CONST(0xc)
#define SATA_AXI_BAR3_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR3_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR3_SZ_0_SCR                  0
#define SATA_AXI_BAR3_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR3_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR3_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR3_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR3_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_SHIFT)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_RANGE                  19:0
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_DEFAULT                        _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_SZ_0_AXI_BAR3_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR4_SZ_0
#define SATA_AXI_BAR4_SZ_0                      _MK_ADDR_CONST(0x10)
#define SATA_AXI_BAR4_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR4_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR4_SZ_0_SCR                  0
#define SATA_AXI_BAR4_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR4_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR4_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR4_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR4_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_SHIFT)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_RANGE                  19:0
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_DEFAULT                        _MK_MASK_CONST(0x1)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_SZ_0_AXI_BAR4_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR5_SZ_0
#define SATA_AXI_BAR5_SZ_0                      _MK_ADDR_CONST(0x14)
#define SATA_AXI_BAR5_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR5_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR5_SZ_0_SCR                  0
#define SATA_AXI_BAR5_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR5_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x2)
#define SATA_AXI_BAR5_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR5_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR5_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_SHIFT)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_RANGE                  19:0
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_DEFAULT                        _MK_MASK_CONST(0x2)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_SZ_0_AXI_BAR5_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR6_SZ_0
#define SATA_AXI_BAR6_SZ_0                      _MK_ADDR_CONST(0x18)
#define SATA_AXI_BAR6_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR6_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR6_SZ_0_SCR                  0
#define SATA_AXI_BAR6_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR6_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR6_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR6_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_SHIFT)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_RANGE                  19:0
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_SZ_0_AXI_BAR6_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR7_SZ_0
#define SATA_AXI_BAR7_SZ_0                      _MK_ADDR_CONST(0x1c)
#define SATA_AXI_BAR7_SZ_0_SECURE                       0x0
#define SATA_AXI_BAR7_SZ_0_DUAL                         0x0
#define SATA_AXI_BAR7_SZ_0_SCR                  0
#define SATA_AXI_BAR7_SZ_0_WORD_COUNT                   0x1
#define SATA_AXI_BAR7_SZ_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_RESET_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR7_SZ_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_READ_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR7_SZ_0_WRITE_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_FIELD                  _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_SHIFT)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_RANGE                  19:0
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_WOFFSET                        0x0
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_DEFAULT_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_SZ_0_AXI_BAR7_SIZE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Reserved address 0x20

// Reserved address 0x24

// Reserved address 0x28

// Reserved address 0x2c

// Reserved address 0x30

// Reserved address 0x34

// Reserved address 0x38

// Reserved address 0x3c

// Register SATA_AXI_BAR0_START_0
#define SATA_AXI_BAR0_START_0                   _MK_ADDR_CONST(0x40)
#define SATA_AXI_BAR0_START_0_SECURE                    0x0
#define SATA_AXI_BAR0_START_0_DUAL                      0x0
#define SATA_AXI_BAR0_START_0_SCR                       0
#define SATA_AXI_BAR0_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR0_START_0_RESET_VAL                         _MK_MASK_CONST(0x3502000)
#define SATA_AXI_BAR0_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR0_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR0_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR0_START_0_AXI_BAR0_START_SHIFT)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_RANGE                      31:12
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_WOFFSET                    0x0
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_DEFAULT                    _MK_MASK_CONST(0x3502)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR0_START_0_AXI_BAR0_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR1_START_0
#define SATA_AXI_BAR1_START_0                   _MK_ADDR_CONST(0x44)
#define SATA_AXI_BAR1_START_0_SECURE                    0x0
#define SATA_AXI_BAR1_START_0_DUAL                      0x0
#define SATA_AXI_BAR1_START_0_SCR                       0
#define SATA_AXI_BAR1_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR1_START_0_RESET_VAL                         _MK_MASK_CONST(0x3503000)
#define SATA_AXI_BAR1_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR1_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR1_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR1_START_0_AXI_BAR1_START_SHIFT)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_RANGE                      31:12
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_WOFFSET                    0x0
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_DEFAULT                    _MK_MASK_CONST(0x3503)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR1_START_0_AXI_BAR1_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR2_START_0
#define SATA_AXI_BAR2_START_0                   _MK_ADDR_CONST(0x48)
#define SATA_AXI_BAR2_START_0_SECURE                    0x0
#define SATA_AXI_BAR2_START_0_DUAL                      0x0
#define SATA_AXI_BAR2_START_0_SCR                       0
#define SATA_AXI_BAR2_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR2_START_0_RESET_VAL                         _MK_MASK_CONST(0x3504000)
#define SATA_AXI_BAR2_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR2_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR2_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR2_START_0_AXI_BAR2_START_SHIFT)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_RANGE                      31:12
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_WOFFSET                    0x0
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_DEFAULT                    _MK_MASK_CONST(0x3504)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR2_START_0_AXI_BAR2_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR3_START_0
#define SATA_AXI_BAR3_START_0                   _MK_ADDR_CONST(0x4c)
#define SATA_AXI_BAR3_START_0_SECURE                    0x0
#define SATA_AXI_BAR3_START_0_DUAL                      0x0
#define SATA_AXI_BAR3_START_0_SCR                       0
#define SATA_AXI_BAR3_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR3_START_0_RESET_VAL                         _MK_MASK_CONST(0x3505000)
#define SATA_AXI_BAR3_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR3_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR3_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR3_START_0_AXI_BAR3_START_SHIFT)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_RANGE                      31:12
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_WOFFSET                    0x0
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_DEFAULT                    _MK_MASK_CONST(0x3505)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR3_START_0_AXI_BAR3_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR4_START_0
#define SATA_AXI_BAR4_START_0                   _MK_ADDR_CONST(0x50)
#define SATA_AXI_BAR4_START_0_SECURE                    0x0
#define SATA_AXI_BAR4_START_0_DUAL                      0x0
#define SATA_AXI_BAR4_START_0_SCR                       0
#define SATA_AXI_BAR4_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR4_START_0_RESET_VAL                         _MK_MASK_CONST(0x3506000)
#define SATA_AXI_BAR4_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR4_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR4_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR4_START_0_AXI_BAR4_START_SHIFT)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_RANGE                      31:12
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_WOFFSET                    0x0
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_DEFAULT                    _MK_MASK_CONST(0x3506)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR4_START_0_AXI_BAR4_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR5_START_0
#define SATA_AXI_BAR5_START_0                   _MK_ADDR_CONST(0x54)
#define SATA_AXI_BAR5_START_0_SECURE                    0x0
#define SATA_AXI_BAR5_START_0_DUAL                      0x0
#define SATA_AXI_BAR5_START_0_SCR                       0
#define SATA_AXI_BAR5_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR5_START_0_RESET_VAL                         _MK_MASK_CONST(0x3507000)
#define SATA_AXI_BAR5_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR5_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR5_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR5_START_0_AXI_BAR5_START_SHIFT)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_RANGE                      31:12
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_WOFFSET                    0x0
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_DEFAULT                    _MK_MASK_CONST(0x3507)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR5_START_0_AXI_BAR5_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR6_START_0
#define SATA_AXI_BAR6_START_0                   _MK_ADDR_CONST(0x58)
#define SATA_AXI_BAR6_START_0_SECURE                    0x0
#define SATA_AXI_BAR6_START_0_DUAL                      0x0
#define SATA_AXI_BAR6_START_0_SCR                       0
#define SATA_AXI_BAR6_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR6_START_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR6_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR6_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR6_START_0_AXI_BAR6_START_SHIFT)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_RANGE                      31:12
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_WOFFSET                    0x0
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR6_START_0_AXI_BAR6_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_AXI_BAR7_START_0
#define SATA_AXI_BAR7_START_0                   _MK_ADDR_CONST(0x5c)
#define SATA_AXI_BAR7_START_0_SECURE                    0x0
#define SATA_AXI_BAR7_START_0_DUAL                      0x0
#define SATA_AXI_BAR7_START_0_SCR                       0
#define SATA_AXI_BAR7_START_0_WORD_COUNT                        0x1
#define SATA_AXI_BAR7_START_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR7_START_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR7_START_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_SHIFT                      _MK_SHIFT_CONST(12)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_FIELD                      _MK_FIELD_CONST(0xfffff, SATA_AXI_BAR7_START_0_AXI_BAR7_START_SHIFT)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_RANGE                      31:12
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_WOFFSET                    0x0
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_DEFAULT_MASK                       _MK_MASK_CONST(0xfffff)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_AXI_BAR7_START_0_AXI_BAR7_START_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Reserved address 0x60

// Reserved address 0x64

// Reserved address 0x68

// Reserved address 0x6c

// Reserved address 0x70

// Reserved address 0x74

// Reserved address 0x78

// Reserved address 0x7c

// Register SATA_FPCI_BAR0_0
#define SATA_FPCI_BAR0_0                        _MK_ADDR_CONST(0x80)
#define SATA_FPCI_BAR0_0_SECURE                         0x0
#define SATA_FPCI_BAR0_0_DUAL                   0x0
#define SATA_FPCI_BAR0_0_SCR                    0
#define SATA_FPCI_BAR0_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR0_0_RESET_VAL                      _MK_MASK_CONST(0xfdfc0001)
#define SATA_FPCI_BAR0_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR0_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR0_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR0_0_FPCI_BAR0_START_SHIFT)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_RANGE                  31:4
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_WOFFSET                        0x0
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_DEFAULT                        _MK_MASK_CONST(0xfdfc000)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR0_0_FPCI_BAR0_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR1_0
#define SATA_FPCI_BAR1_0                        _MK_ADDR_CONST(0x84)
#define SATA_FPCI_BAR1_0_SECURE                         0x0
#define SATA_FPCI_BAR1_0_DUAL                   0x0
#define SATA_FPCI_BAR1_0_SCR                    0
#define SATA_FPCI_BAR1_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR1_0_RESET_VAL                      _MK_MASK_CONST(0xfdfc0001)
#define SATA_FPCI_BAR1_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR1_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR1_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR1_0_FPCI_BAR1_START_SHIFT)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_RANGE                  31:4
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_WOFFSET                        0x0
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_DEFAULT                        _MK_MASK_CONST(0xfdfc000)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR1_0_FPCI_BAR1_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR2_0
#define SATA_FPCI_BAR2_0                        _MK_ADDR_CONST(0x88)
#define SATA_FPCI_BAR2_0_SECURE                         0x0
#define SATA_FPCI_BAR2_0_DUAL                   0x0
#define SATA_FPCI_BAR2_0_SCR                    0
#define SATA_FPCI_BAR2_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR2_0_RESET_VAL                      _MK_MASK_CONST(0xfdfc0001)
#define SATA_FPCI_BAR2_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR2_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR2_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR2_0_FPCI_BAR2_START_SHIFT)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_RANGE                  31:4
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_WOFFSET                        0x0
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_DEFAULT                        _MK_MASK_CONST(0xfdfc000)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR2_0_FPCI_BAR2_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR3_0
#define SATA_FPCI_BAR3_0                        _MK_ADDR_CONST(0x8c)
#define SATA_FPCI_BAR3_0_SECURE                         0x0
#define SATA_FPCI_BAR3_0_DUAL                   0x0
#define SATA_FPCI_BAR3_0_SCR                    0
#define SATA_FPCI_BAR3_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR3_0_RESET_VAL                      _MK_MASK_CONST(0xfdfc0001)
#define SATA_FPCI_BAR3_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR3_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR3_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR3_0_FPCI_BAR3_START_SHIFT)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_RANGE                  31:4
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_WOFFSET                        0x0
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_DEFAULT                        _MK_MASK_CONST(0xfdfc000)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR3_0_FPCI_BAR3_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR4_0
#define SATA_FPCI_BAR4_0                        _MK_ADDR_CONST(0x90)
#define SATA_FPCI_BAR4_0_SECURE                         0x0
#define SATA_FPCI_BAR4_0_DUAL                   0x0
#define SATA_FPCI_BAR4_0_SCR                    0
#define SATA_FPCI_BAR4_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR4_0_RESET_VAL                      _MK_MASK_CONST(0xfdfc0001)
#define SATA_FPCI_BAR4_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR4_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR4_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR4_0_FPCI_BAR4_START_SHIFT)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_RANGE                  31:4
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_WOFFSET                        0x0
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_DEFAULT                        _MK_MASK_CONST(0xfdfc000)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR4_0_FPCI_BAR4_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR5_0
#define SATA_FPCI_BAR5_0                        _MK_ADDR_CONST(0x94)
#define SATA_FPCI_BAR5_0_SECURE                         0x0
#define SATA_FPCI_BAR5_0_DUAL                   0x0
#define SATA_FPCI_BAR5_0_SCR                    0
#define SATA_FPCI_BAR5_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR5_0_RESET_VAL                      _MK_MASK_CONST(0xfdfc0001)
#define SATA_FPCI_BAR5_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR5_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR5_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR5_0_FPCI_BAR5_START_SHIFT)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_RANGE                  31:4
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_WOFFSET                        0x0
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_DEFAULT                        _MK_MASK_CONST(0xfdfc000)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR5_0_FPCI_BAR5_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR6_0
#define SATA_FPCI_BAR6_0                        _MK_ADDR_CONST(0x98)
#define SATA_FPCI_BAR6_0_SECURE                         0x0
#define SATA_FPCI_BAR6_0_DUAL                   0x0
#define SATA_FPCI_BAR6_0_SCR                    0
#define SATA_FPCI_BAR6_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR6_0_RESET_VAL                      _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR6_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR6_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR6_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR6_0_FPCI_BAR6_START_SHIFT)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_RANGE                  31:4
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_WOFFSET                        0x0
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR6_0_FPCI_BAR6_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_FPCI_BAR7_0
#define SATA_FPCI_BAR7_0                        _MK_ADDR_CONST(0x9c)
#define SATA_FPCI_BAR7_0_SECURE                         0x0
#define SATA_FPCI_BAR7_0_DUAL                   0x0
#define SATA_FPCI_BAR7_0_SCR                    0
#define SATA_FPCI_BAR7_0_WORD_COUNT                     0x1
#define SATA_FPCI_BAR7_0_RESET_VAL                      _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR7_0_RESET_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR7_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_READ_MASK                      _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR7_0_WRITE_MASK                     _MK_MASK_CONST(0xfffffff1)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_SHIFT                  _MK_SHIFT_CONST(4)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_FIELD                  _MK_FIELD_CONST(0xfffffff, SATA_FPCI_BAR7_0_FPCI_BAR7_START_SHIFT)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_RANGE                  31:4
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_WOFFSET                        0x0
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_DEFAULT_MASK                   _MK_MASK_CONST(0xfffffff)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_START_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_SHIFT)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_RANGE                    0:0
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_WOFFSET                  0x0
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_BAR7_0_FPCI_BAR7_ACCESS_TYPE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Reserved address 0xa0

// Reserved address 0xa4

// Reserved address 0xa8

// Reserved address 0xac

// Reserved address 0xb0

// Reserved address 0xb4

// Reserved address 0xb8

// Reserved address 0xbc

// Register SATA_MSI_BAR_SZ_0
#define SATA_MSI_BAR_SZ_0                       _MK_ADDR_CONST(0xc0)
#define SATA_MSI_BAR_SZ_0_SECURE                        0x0
#define SATA_MSI_BAR_SZ_0_DUAL                  0x0
#define SATA_MSI_BAR_SZ_0_SCR                   0
#define SATA_MSI_BAR_SZ_0_WORD_COUNT                    0x1
#define SATA_MSI_BAR_SZ_0_RESET_VAL                     _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_RESET_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_MSI_BAR_SZ_0_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_READ_MASK                     _MK_MASK_CONST(0xfffff)
#define SATA_MSI_BAR_SZ_0_WRITE_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_FIELD                    _MK_FIELD_CONST(0xfffff, SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_SHIFT)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_RANGE                    19:0
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_WOFFSET                  0x0
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_DEFAULT_MASK                     _MK_MASK_CONST(0xfffff)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_MSI_BAR_SZ_0_MSI_BAR_SIZE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_MSI_AXI_BAR_ST_0
#define SATA_MSI_AXI_BAR_ST_0                   _MK_ADDR_CONST(0xc4)
#define SATA_MSI_AXI_BAR_ST_0_SECURE                    0x0
#define SATA_MSI_AXI_BAR_ST_0_DUAL                      0x0
#define SATA_MSI_AXI_BAR_ST_0_SCR                       0
#define SATA_MSI_AXI_BAR_ST_0_WORD_COUNT                        0x1
#define SATA_MSI_AXI_BAR_ST_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_RESET_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_MSI_AXI_BAR_ST_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_READ_MASK                         _MK_MASK_CONST(0xfffff000)
#define SATA_MSI_AXI_BAR_ST_0_WRITE_MASK                        _MK_MASK_CONST(0xfffff000)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_SHIFT                   _MK_SHIFT_CONST(12)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_FIELD                   _MK_FIELD_CONST(0xfffff, SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_SHIFT)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_RANGE                   31:12
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_WOFFSET                 0x0
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_DEFAULT_MASK                    _MK_MASK_CONST(0xfffff)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_MSI_AXI_BAR_ST_0_MSI_AXI_BAR_START_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register SATA_MSI_FPCI_BAR_ST_0
#define SATA_MSI_FPCI_BAR_ST_0                  _MK_ADDR_CONST(0xc8)
#define SATA_MSI_FPCI_BAR_ST_0_SECURE                   0x0
#define SATA_MSI_FPCI_BAR_ST_0_DUAL                     0x0
#define SATA_MSI_FPCI_BAR_ST_0_SCR                      0
#define SATA_MSI_FPCI_BAR_ST_0_WORD_COUNT                       0x1
#define SATA_MSI_FPCI_BAR_ST_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_RESET_MASK                       _MK_MASK_CONST(0xfffffff0)
#define SATA_MSI_FPCI_BAR_ST_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_READ_MASK                        _MK_MASK_CONST(0xfffffff0)
#define SATA_MSI_FPCI_BAR_ST_0_WRITE_MASK                       _MK_MASK_CONST(0xfffffff0)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_SHIFT                 _MK_SHIFT_CONST(4)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_FIELD                 _MK_FIELD_CONST(0xfffffff, SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_SHIFT)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_RANGE                 31:4
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_WOFFSET                       0x0
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_DEFAULT_MASK                  _MK_MASK_CONST(0xfffffff)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_MSI_FPCI_BAR_ST_0_MSI_FPCI_BAR_START_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Reserved address 0xcc

// Reserved address 0xd0

// Reserved address 0xd4

// Reserved address 0xd8

// Reserved address 0xdc

// Reserved address 0xe0

// Reserved address 0xe4

// Reserved address 0xe8

// Reserved address 0xec

// Reserved address 0xf0

// Reserved address 0xf4

// Reserved address 0xf8

// Reserved address 0xfc

// Register SATA_MSI_VEC0_0
#define SATA_MSI_VEC0_0                 _MK_ADDR_CONST(0x100)
#define SATA_MSI_VEC0_0_SECURE                  0x0
#define SATA_MSI_VEC0_0_DUAL                    0x0
#define SATA_MSI_VEC0_0_SCR                     0
#define SATA_MSI_VEC0_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC0_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC0_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC0_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC0_0_MSI_VECTOR0_SHIFT)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_RANGE                       31:0
#define SATA_MSI_VEC0_0_MSI_VECTOR0_WOFFSET                     0x0
#define SATA_MSI_VEC0_0_MSI_VECTOR0_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC0_0_MSI_VECTOR0_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC1_0
#define SATA_MSI_VEC1_0                 _MK_ADDR_CONST(0x104)
#define SATA_MSI_VEC1_0_SECURE                  0x0
#define SATA_MSI_VEC1_0_DUAL                    0x0
#define SATA_MSI_VEC1_0_SCR                     0
#define SATA_MSI_VEC1_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC1_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC1_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC1_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC1_0_MSI_VECTOR1_SHIFT)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_RANGE                       31:0
#define SATA_MSI_VEC1_0_MSI_VECTOR1_WOFFSET                     0x0
#define SATA_MSI_VEC1_0_MSI_VECTOR1_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC1_0_MSI_VECTOR1_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC2_0
#define SATA_MSI_VEC2_0                 _MK_ADDR_CONST(0x108)
#define SATA_MSI_VEC2_0_SECURE                  0x0
#define SATA_MSI_VEC2_0_DUAL                    0x0
#define SATA_MSI_VEC2_0_SCR                     0
#define SATA_MSI_VEC2_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC2_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC2_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC2_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC2_0_MSI_VECTOR2_SHIFT)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_RANGE                       31:0
#define SATA_MSI_VEC2_0_MSI_VECTOR2_WOFFSET                     0x0
#define SATA_MSI_VEC2_0_MSI_VECTOR2_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC2_0_MSI_VECTOR2_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC3_0
#define SATA_MSI_VEC3_0                 _MK_ADDR_CONST(0x10c)
#define SATA_MSI_VEC3_0_SECURE                  0x0
#define SATA_MSI_VEC3_0_DUAL                    0x0
#define SATA_MSI_VEC3_0_SCR                     0
#define SATA_MSI_VEC3_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC3_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC3_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC3_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC3_0_MSI_VECTOR3_SHIFT)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_RANGE                       31:0
#define SATA_MSI_VEC3_0_MSI_VECTOR3_WOFFSET                     0x0
#define SATA_MSI_VEC3_0_MSI_VECTOR3_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC3_0_MSI_VECTOR3_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC4_0
#define SATA_MSI_VEC4_0                 _MK_ADDR_CONST(0x110)
#define SATA_MSI_VEC4_0_SECURE                  0x0
#define SATA_MSI_VEC4_0_DUAL                    0x0
#define SATA_MSI_VEC4_0_SCR                     0
#define SATA_MSI_VEC4_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC4_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC4_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC4_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC4_0_MSI_VECTOR4_SHIFT)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_RANGE                       31:0
#define SATA_MSI_VEC4_0_MSI_VECTOR4_WOFFSET                     0x0
#define SATA_MSI_VEC4_0_MSI_VECTOR4_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC4_0_MSI_VECTOR4_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC5_0
#define SATA_MSI_VEC5_0                 _MK_ADDR_CONST(0x114)
#define SATA_MSI_VEC5_0_SECURE                  0x0
#define SATA_MSI_VEC5_0_DUAL                    0x0
#define SATA_MSI_VEC5_0_SCR                     0
#define SATA_MSI_VEC5_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC5_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC5_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC5_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC5_0_MSI_VECTOR5_SHIFT)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_RANGE                       31:0
#define SATA_MSI_VEC5_0_MSI_VECTOR5_WOFFSET                     0x0
#define SATA_MSI_VEC5_0_MSI_VECTOR5_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC5_0_MSI_VECTOR5_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC6_0
#define SATA_MSI_VEC6_0                 _MK_ADDR_CONST(0x118)
#define SATA_MSI_VEC6_0_SECURE                  0x0
#define SATA_MSI_VEC6_0_DUAL                    0x0
#define SATA_MSI_VEC6_0_SCR                     0
#define SATA_MSI_VEC6_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC6_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC6_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC6_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC6_0_MSI_VECTOR6_SHIFT)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_RANGE                       31:0
#define SATA_MSI_VEC6_0_MSI_VECTOR6_WOFFSET                     0x0
#define SATA_MSI_VEC6_0_MSI_VECTOR6_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC6_0_MSI_VECTOR6_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_MSI_VEC7_0
#define SATA_MSI_VEC7_0                 _MK_ADDR_CONST(0x11c)
#define SATA_MSI_VEC7_0_SECURE                  0x0
#define SATA_MSI_VEC7_0_DUAL                    0x0
#define SATA_MSI_VEC7_0_SCR                     0
#define SATA_MSI_VEC7_0_WORD_COUNT                      0x1
#define SATA_MSI_VEC7_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC7_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC7_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_FIELD                       _MK_FIELD_CONST(0xffffffff, SATA_MSI_VEC7_0_MSI_VECTOR7_SHIFT)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_RANGE                       31:0
#define SATA_MSI_VEC7_0_MSI_VECTOR7_WOFFSET                     0x0
#define SATA_MSI_VEC7_0_MSI_VECTOR7_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_MSI_VEC7_0_MSI_VECTOR7_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Reserved address 0x120

// Reserved address 0x124

// Reserved address 0x128

// Reserved address 0x12c

// Reserved address 0x130

// Reserved address 0x134

// Reserved address 0x138

// Reserved address 0x13c

// Register SATA_MSI_EN_VEC0_0
#define SATA_MSI_EN_VEC0_0                      _MK_ADDR_CONST(0x140)
#define SATA_MSI_EN_VEC0_0_SECURE                       0x0
#define SATA_MSI_EN_VEC0_0_DUAL                         0x0
#define SATA_MSI_EN_VEC0_0_SCR                  0
#define SATA_MSI_EN_VEC0_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC0_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC0_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC0_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_SHIFT)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_RANGE                     31:0
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_WOFFSET                   0x0
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC0_0_MSI_ENABLE_VECTOR0_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC1_0
#define SATA_MSI_EN_VEC1_0                      _MK_ADDR_CONST(0x144)
#define SATA_MSI_EN_VEC1_0_SECURE                       0x0
#define SATA_MSI_EN_VEC1_0_DUAL                         0x0
#define SATA_MSI_EN_VEC1_0_SCR                  0
#define SATA_MSI_EN_VEC1_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC1_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC1_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC1_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_SHIFT)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_RANGE                     31:0
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_WOFFSET                   0x0
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC1_0_MSI_ENABLE_VECTOR1_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC2_0
#define SATA_MSI_EN_VEC2_0                      _MK_ADDR_CONST(0x148)
#define SATA_MSI_EN_VEC2_0_SECURE                       0x0
#define SATA_MSI_EN_VEC2_0_DUAL                         0x0
#define SATA_MSI_EN_VEC2_0_SCR                  0
#define SATA_MSI_EN_VEC2_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC2_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC2_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC2_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_SHIFT)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_RANGE                     31:0
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_WOFFSET                   0x0
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC2_0_MSI_ENABLE_VECTOR2_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC3_0
#define SATA_MSI_EN_VEC3_0                      _MK_ADDR_CONST(0x14c)
#define SATA_MSI_EN_VEC3_0_SECURE                       0x0
#define SATA_MSI_EN_VEC3_0_DUAL                         0x0
#define SATA_MSI_EN_VEC3_0_SCR                  0
#define SATA_MSI_EN_VEC3_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC3_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC3_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC3_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_SHIFT)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_RANGE                     31:0
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_WOFFSET                   0x0
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC3_0_MSI_ENABLE_VECTOR3_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC4_0
#define SATA_MSI_EN_VEC4_0                      _MK_ADDR_CONST(0x150)
#define SATA_MSI_EN_VEC4_0_SECURE                       0x0
#define SATA_MSI_EN_VEC4_0_DUAL                         0x0
#define SATA_MSI_EN_VEC4_0_SCR                  0
#define SATA_MSI_EN_VEC4_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC4_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC4_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC4_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_SHIFT)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_RANGE                     31:0
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_WOFFSET                   0x0
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC4_0_MSI_ENABLE_VECTOR4_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC5_0
#define SATA_MSI_EN_VEC5_0                      _MK_ADDR_CONST(0x154)
#define SATA_MSI_EN_VEC5_0_SECURE                       0x0
#define SATA_MSI_EN_VEC5_0_DUAL                         0x0
#define SATA_MSI_EN_VEC5_0_SCR                  0
#define SATA_MSI_EN_VEC5_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC5_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC5_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC5_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_SHIFT)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_RANGE                     31:0
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_WOFFSET                   0x0
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC5_0_MSI_ENABLE_VECTOR5_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC6_0
#define SATA_MSI_EN_VEC6_0                      _MK_ADDR_CONST(0x158)
#define SATA_MSI_EN_VEC6_0_SECURE                       0x0
#define SATA_MSI_EN_VEC6_0_DUAL                         0x0
#define SATA_MSI_EN_VEC6_0_SCR                  0
#define SATA_MSI_EN_VEC6_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC6_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC6_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC6_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_SHIFT)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_RANGE                     31:0
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_WOFFSET                   0x0
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC6_0_MSI_ENABLE_VECTOR6_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_MSI_EN_VEC7_0
#define SATA_MSI_EN_VEC7_0                      _MK_ADDR_CONST(0x15c)
#define SATA_MSI_EN_VEC7_0_SECURE                       0x0
#define SATA_MSI_EN_VEC7_0_DUAL                         0x0
#define SATA_MSI_EN_VEC7_0_SCR                  0
#define SATA_MSI_EN_VEC7_0_WORD_COUNT                   0x1
#define SATA_MSI_EN_VEC7_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC7_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC7_0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_FIELD                     _MK_FIELD_CONST(0xffffffff, SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_SHIFT)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_RANGE                     31:0
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_WOFFSET                   0x0
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_MSI_EN_VEC7_0_MSI_ENABLE_VECTOR7_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Reserved address 0x160

// Reserved address 0x164

// Reserved address 0x168

// Reserved address 0x16c

// Reserved address 0x170

// Reserved address 0x174

// Reserved address 0x178

// Reserved address 0x17c

// Register SATA_CONFIGURATION_0
#define SATA_CONFIGURATION_0                    _MK_ADDR_CONST(0x180)
#define SATA_CONFIGURATION_0_SECURE                     0x0
#define SATA_CONFIGURATION_0_DUAL                       0x0
#define SATA_CONFIGURATION_0_SCR                        0
#define SATA_CONFIGURATION_0_WORD_COUNT                         0x1
#define SATA_CONFIGURATION_0_RESET_VAL                  _MK_MASK_CONST(0x800e8e40)
#define SATA_CONFIGURATION_0_RESET_MASK                         _MK_MASK_CONST(0x800eceff)
#define SATA_CONFIGURATION_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_READ_MASK                  _MK_MASK_CONST(0x800eceff)
#define SATA_CONFIGURATION_0_WRITE_MASK                         _MK_MASK_CONST(0x8008c0ff)
#define SATA_CONFIGURATION_0_EN_FPCI_SHIFT                      _MK_SHIFT_CONST(0)
#define SATA_CONFIGURATION_0_EN_FPCI_FIELD                      _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_EN_FPCI_SHIFT)
#define SATA_CONFIGURATION_0_EN_FPCI_RANGE                      0:0
#define SATA_CONFIGURATION_0_EN_FPCI_WOFFSET                    0x0
#define SATA_CONFIGURATION_0_EN_FPCI_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_EN_FPCI_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_EN_FPCI_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_EN_FPCI_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_EN_FPCI_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_EN_FPCI_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_DFPCI_PASSPW_SHIFT                 _MK_SHIFT_CONST(1)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_FIELD                 _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_DFPCI_PASSPW_SHIFT)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_RANGE                 1:1
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_WOFFSET                       0x0
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PASSPW_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_SHIFT                      _MK_SHIFT_CONST(2)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_FIELD                      _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_SHIFT)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_RANGE                      2:2
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_WOFFSET                    0x0
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_RSPPASSPW_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_SHIFT                      _MK_SHIFT_CONST(3)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_FIELD                      _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_SHIFT)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_RANGE                      3:3
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_WOFFSET                    0x0
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_DFPCI_PWPASSNPW_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_SHIFT                      _MK_SHIFT_CONST(4)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_FIELD                      _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_SHIFT)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_RANGE                      4:4
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_WOFFSET                    0x0
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSNPW_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_UFPCI_PASSPW_SHIFT                 _MK_SHIFT_CONST(5)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_FIELD                 _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_UFPCI_PASSPW_SHIFT)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_RANGE                 5:5
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_WOFFSET                       0x0
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PASSPW_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_SHIFT                       _MK_SHIFT_CONST(6)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_FIELD                       _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_UFPCI_PWPASSPW_SHIFT)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_RANGE                       6:6
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_WOFFSET                     0x0
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_DEFAULT                     _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_PWPASSPW_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_UFPCI_MSIAW_SHIFT                  _MK_SHIFT_CONST(7)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_FIELD                  _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_UFPCI_MSIAW_SHIFT)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_RANGE                  7:7
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_WOFFSET                        0x0
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_UFPCI_MSIAW_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_SHIFT                        _MK_SHIFT_CONST(9)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_FIELD                        _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_MSI_VEC_EMPTY_SHIFT)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_RANGE                        9:9
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_WOFFSET                      0x0
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_DEFAULT                      _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_MSI_VEC_EMPTY_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_SHIFT                    _MK_SHIFT_CONST(10)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_FIELD                    _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_SHIFT)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_RANGE                    10:10
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_WOFFSET                  0x0
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_DEFAULT                  _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_TARGET_WRITE_IDLE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_SHIFT                     _MK_SHIFT_CONST(11)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_FIELD                     _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_TARGET_READ_IDLE_SHIFT)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_RANGE                     11:11
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_WOFFSET                   0x0
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_DEFAULT                   _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_TARGET_READ_IDLE_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_SHIFT                        _MK_SHIFT_CONST(14)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_FIELD                        _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_WR_INTRLV_CYA_SHIFT)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_RANGE                        14:14
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_WOFFSET                      0x0
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WR_INTRLV_CYA_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_SHIFT                       _MK_SHIFT_CONST(15)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_FIELD                       _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_WDATA_LEAD_CYA_SHIFT)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_RANGE                       15:15
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_WOFFSET                     0x0
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_DEFAULT                     _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_WDATA_LEAD_CYA_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_SHIFT                 _MK_SHIFT_CONST(17)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_FIELD                 _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_SHIFT)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_RANGE                 17:17
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_WOFFSET                       0x0
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_DEFAULT                       _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_INITIATOR_WRITE_IDLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_SHIFT                  _MK_SHIFT_CONST(18)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_FIELD                  _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_SHIFT)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_RANGE                  18:18
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_WOFFSET                        0x0
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_DEFAULT                        _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_INITIATOR_READ_IDLE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_SHIFT                 _MK_SHIFT_CONST(19)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_FIELD                 _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_SHIFT)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_RANGE                 19:19
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_WOFFSET                       0x0
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_DEFAULT                       _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_PW_NO_DEVSEL_ERR_CYA_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_SHIFT                       _MK_SHIFT_CONST(31)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_FIELD                       _MK_FIELD_CONST(0x1, SATA_CONFIGURATION_0_CLKEN_OVERRIDE_SHIFT)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_RANGE                       31:31
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_WOFFSET                     0x0
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_DEFAULT                     _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_CONFIGURATION_0_CLKEN_OVERRIDE_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_FPCI_ERROR_MASKS_0
#define SATA_FPCI_ERROR_MASKS_0                 _MK_ADDR_CONST(0x184)
#define SATA_FPCI_ERROR_MASKS_0_SECURE                  0x0
#define SATA_FPCI_ERROR_MASKS_0_DUAL                    0x0
#define SATA_FPCI_ERROR_MASKS_0_SCR                     0
#define SATA_FPCI_ERROR_MASKS_0_WORD_COUNT                      0x1
#define SATA_FPCI_ERROR_MASKS_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_RESET_MASK                      _MK_MASK_CONST(0x7)
#define SATA_FPCI_ERROR_MASKS_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_READ_MASK                       _MK_MASK_CONST(0x7)
#define SATA_FPCI_ERROR_MASKS_0_WRITE_MASK                      _MK_MASK_CONST(0x7)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_SHIFT)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_RANGE                    0:0
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_WOFFSET                  0x0
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_TARGET_ABORT_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_SHIFT                      _MK_SHIFT_CONST(1)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_FIELD                      _MK_FIELD_CONST(0x1, SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_SHIFT)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_RANGE                      1:1
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_WOFFSET                    0x0
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_DATA_ERROR_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_SHIFT                    _MK_SHIFT_CONST(2)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_FIELD                    _MK_FIELD_CONST(0x1, SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_SHIFT)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_RANGE                    2:2
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_WOFFSET                  0x0
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_ERROR_MASKS_0_MASK_FPCI_MASTER_ABORT_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_INTR_MASK_0
#define SATA_INTR_MASK_0                        _MK_ADDR_CONST(0x188)
#define SATA_INTR_MASK_0_SECURE                         0x0
#define SATA_INTR_MASK_0_DUAL                   0x0
#define SATA_INTR_MASK_0_SCR                    0
#define SATA_INTR_MASK_0_WORD_COUNT                     0x1
#define SATA_INTR_MASK_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_RESET_MASK                     _MK_MASK_CONST(0x10101)
#define SATA_INTR_MASK_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_READ_MASK                      _MK_MASK_CONST(0x10101)
#define SATA_INTR_MASK_0_WRITE_MASK                     _MK_MASK_CONST(0x10101)
#define SATA_INTR_MASK_0_INT_MASK_SHIFT                 _MK_SHIFT_CONST(0)
#define SATA_INTR_MASK_0_INT_MASK_FIELD                 _MK_FIELD_CONST(0x1, SATA_INTR_MASK_0_INT_MASK_SHIFT)
#define SATA_INTR_MASK_0_INT_MASK_RANGE                 0:0
#define SATA_INTR_MASK_0_INT_MASK_WOFFSET                       0x0
#define SATA_INTR_MASK_0_INT_MASK_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_INT_MASK_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_INTR_MASK_0_INT_MASK_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_INT_MASK_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_INT_MASK_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_INT_MASK_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_INTR_MASK_0_MSI_MASK_SHIFT                 _MK_SHIFT_CONST(8)
#define SATA_INTR_MASK_0_MSI_MASK_FIELD                 _MK_FIELD_CONST(0x1, SATA_INTR_MASK_0_MSI_MASK_SHIFT)
#define SATA_INTR_MASK_0_MSI_MASK_RANGE                 8:8
#define SATA_INTR_MASK_0_MSI_MASK_WOFFSET                       0x0
#define SATA_INTR_MASK_0_MSI_MASK_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_MSI_MASK_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_INTR_MASK_0_MSI_MASK_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_MSI_MASK_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_MSI_MASK_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_MSI_MASK_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_INTR_MASK_0_IP_INT_MASK_SHIFT                      _MK_SHIFT_CONST(16)
#define SATA_INTR_MASK_0_IP_INT_MASK_FIELD                      _MK_FIELD_CONST(0x1, SATA_INTR_MASK_0_IP_INT_MASK_SHIFT)
#define SATA_INTR_MASK_0_IP_INT_MASK_RANGE                      16:16
#define SATA_INTR_MASK_0_IP_INT_MASK_WOFFSET                    0x0
#define SATA_INTR_MASK_0_IP_INT_MASK_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_IP_INT_MASK_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_INTR_MASK_0_IP_INT_MASK_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_IP_INT_MASK_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_IP_INT_MASK_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_INTR_MASK_0_IP_INT_MASK_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_INTR_CODE_0
#define SATA_INTR_CODE_0                        _MK_ADDR_CONST(0x18c)
#define SATA_INTR_CODE_0_SECURE                         0x0
#define SATA_INTR_CODE_0_DUAL                   0x0
#define SATA_INTR_CODE_0_SCR                    0
#define SATA_INTR_CODE_0_WORD_COUNT                     0x1
#define SATA_INTR_CODE_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_RESET_MASK                     _MK_MASK_CONST(0x1f)
#define SATA_INTR_CODE_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_READ_MASK                      _MK_MASK_CONST(0x1f)
#define SATA_INTR_CODE_0_WRITE_MASK                     _MK_MASK_CONST(0x1f)
#define SATA_INTR_CODE_0_INT_CODE_SHIFT                 _MK_SHIFT_CONST(0)
#define SATA_INTR_CODE_0_INT_CODE_FIELD                 _MK_FIELD_CONST(0x1f, SATA_INTR_CODE_0_INT_CODE_SHIFT)
#define SATA_INTR_CODE_0_INT_CODE_RANGE                 4:0
#define SATA_INTR_CODE_0_INT_CODE_WOFFSET                       0x0
#define SATA_INTR_CODE_0_INT_CODE_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_INT_CODE_DEFAULT_MASK                  _MK_MASK_CONST(0x1f)
#define SATA_INTR_CODE_0_INT_CODE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_INT_CODE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_INT_CODE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_INTR_CODE_0_INT_CODE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_CLEAR                        _MK_ENUM_CONST(0)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_INI_SLVERR                   _MK_ENUM_CONST(1)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_INI_DECERR                   _MK_ENUM_CONST(2)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_TGT_SLVERR                   _MK_ENUM_CONST(3)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_TGT_DECERR                   _MK_ENUM_CONST(4)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_TGT_WRERR                    _MK_ENUM_CONST(5)
#define SATA_INTR_CODE_0_INT_CODE_RSVD1                 _MK_ENUM_CONST(6)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_DFPCI_DECERR                 _MK_ENUM_CONST(7)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_AXI_DECERR                   _MK_ENUM_CONST(8)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_FPCI_TIMEOUT                 _MK_ENUM_CONST(9)
#define SATA_INTR_CODE_0_INT_CODE_RSVD2                 _MK_ENUM_CONST(10)
#define SATA_INTR_CODE_0_INT_CODE_RSVD3                 _MK_ENUM_CONST(11)
#define SATA_INTR_CODE_0_INT_CODE_RSVD4                 _MK_ENUM_CONST(12)
#define SATA_INTR_CODE_0_INT_CODE_RSVD5                 _MK_ENUM_CONST(13)
#define SATA_INTR_CODE_0_INT_CODE_RSVD6                 _MK_ENUM_CONST(14)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_SM_FATAL_ERROR                       _MK_ENUM_CONST(15)
#define SATA_INTR_CODE_0_INT_CODE_INT_CODE_SM_NON_FATAL_ERROR                   _MK_ENUM_CONST(16)


// Register SATA_INTR_SIGNATURE_0
#define SATA_INTR_SIGNATURE_0                   _MK_ADDR_CONST(0x190)
#define SATA_INTR_SIGNATURE_0_SECURE                    0x0
#define SATA_INTR_SIGNATURE_0_DUAL                      0x0
#define SATA_INTR_SIGNATURE_0_SCR                       0
#define SATA_INTR_SIGNATURE_0_WORD_COUNT                        0x1
#define SATA_INTR_SIGNATURE_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_RESET_MASK                        _MK_MASK_CONST(0xfffffffd)
#define SATA_INTR_SIGNATURE_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_READ_MASK                         _MK_MASK_CONST(0xfffffffd)
#define SATA_INTR_SIGNATURE_0_WRITE_MASK                        _MK_MASK_CONST(0xfffffffd)
#define SATA_INTR_SIGNATURE_0_DIR_SHIFT                 _MK_SHIFT_CONST(0)
#define SATA_INTR_SIGNATURE_0_DIR_FIELD                 _MK_FIELD_CONST(0x1, SATA_INTR_SIGNATURE_0_DIR_SHIFT)
#define SATA_INTR_SIGNATURE_0_DIR_RANGE                 0:0
#define SATA_INTR_SIGNATURE_0_DIR_WOFFSET                       0x0
#define SATA_INTR_SIGNATURE_0_DIR_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_DIR_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_INTR_SIGNATURE_0_DIR_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_DIR_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_DIR_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_DIR_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define SATA_INTR_SIGNATURE_0_DIR_WRITE                 _MK_ENUM_CONST(0)
#define SATA_INTR_SIGNATURE_0_DIR_READ                  _MK_ENUM_CONST(1)

#define SATA_INTR_SIGNATURE_0_INT_INFO_SHIFT                    _MK_SHIFT_CONST(2)
#define SATA_INTR_SIGNATURE_0_INT_INFO_FIELD                    _MK_FIELD_CONST(0x3fffffff, SATA_INTR_SIGNATURE_0_INT_INFO_SHIFT)
#define SATA_INTR_SIGNATURE_0_INT_INFO_RANGE                    31:2
#define SATA_INTR_SIGNATURE_0_INT_INFO_WOFFSET                  0x0
#define SATA_INTR_SIGNATURE_0_INT_INFO_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_INT_INFO_DEFAULT_MASK                     _MK_MASK_CONST(0x3fffffff)
#define SATA_INTR_SIGNATURE_0_INT_INFO_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_INT_INFO_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_INT_INFO_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_INTR_SIGNATURE_0_INT_INFO_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_UPPER_FPCI_ADDR_0
#define SATA_UPPER_FPCI_ADDR_0                  _MK_ADDR_CONST(0x194)
#define SATA_UPPER_FPCI_ADDR_0_SECURE                   0x0
#define SATA_UPPER_FPCI_ADDR_0_DUAL                     0x0
#define SATA_UPPER_FPCI_ADDR_0_SCR                      0
#define SATA_UPPER_FPCI_ADDR_0_WORD_COUNT                       0x1
#define SATA_UPPER_FPCI_ADDR_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_RESET_MASK                       _MK_MASK_CONST(0xff)
#define SATA_UPPER_FPCI_ADDR_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_READ_MASK                        _MK_MASK_CONST(0xff)
#define SATA_UPPER_FPCI_ADDR_0_WRITE_MASK                       _MK_MASK_CONST(0xff)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_FIELD                     _MK_FIELD_CONST(0xff, SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_SHIFT)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_RANGE                     7:0
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_WOFFSET                   0x0
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_DEFAULT_MASK                      _MK_MASK_CONST(0xff)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_UPPER_FPCI_ADDR_0_INT_INFO_UPPER_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_IPFS_INTR_ENABLE_0
#define SATA_IPFS_INTR_ENABLE_0                 _MK_ADDR_CONST(0x198)
#define SATA_IPFS_INTR_ENABLE_0_SECURE                  0x0
#define SATA_IPFS_INTR_ENABLE_0_DUAL                    0x0
#define SATA_IPFS_INTR_ENABLE_0_SCR                     0
#define SATA_IPFS_INTR_ENABLE_0_WORD_COUNT                      0x1
#define SATA_IPFS_INTR_ENABLE_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_RESET_MASK                      _MK_MASK_CONST(0x30ff)
#define SATA_IPFS_INTR_ENABLE_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_READ_MASK                       _MK_MASK_CONST(0x30ff)
#define SATA_IPFS_INTR_ENABLE_0_WRITE_MASK                      _MK_MASK_CONST(0x30ff)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_FIELD                     _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_RANGE                     0:0
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_WOFFSET                   0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_SLVERR_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_SHIFT                     _MK_SHIFT_CONST(1)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_FIELD                     _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_RANGE                     1:1
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_WOFFSET                   0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_INI_DECERR_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_SHIFT                     _MK_SHIFT_CONST(2)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_FIELD                     _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_RANGE                     2:2
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_WOFFSET                   0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_SLVERR_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_SHIFT                     _MK_SHIFT_CONST(3)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_FIELD                     _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_RANGE                     3:3
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_WOFFSET                   0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_DECERR_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_SHIFT                      _MK_SHIFT_CONST(4)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_FIELD                      _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_RANGE                      4:4
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_WOFFSET                    0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_TGT_WRERR_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_SHIFT                   _MK_SHIFT_CONST(5)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_FIELD                   _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_RANGE                   5:5
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_WOFFSET                 0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_DFPCI_DECERR_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_SHIFT                     _MK_SHIFT_CONST(6)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_FIELD                     _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_RANGE                     6:6
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_WOFFSET                   0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_AXI_DECERR_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_SHIFT                   _MK_SHIFT_CONST(7)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_FIELD                   _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_RANGE                   7:7
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_WOFFSET                 0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_FPCI_TIMEOUT_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_SHIFT                 _MK_SHIFT_CONST(12)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_FIELD                 _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_RANGE                 12:12
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_WOFFSET                       0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_FATAL_ERROR_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_SHIFT                     _MK_SHIFT_CONST(13)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_FIELD                     _MK_FIELD_CONST(0x1, SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_SHIFT)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_RANGE                     13:13
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_WOFFSET                   0x0
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_IPFS_INTR_ENABLE_0_EN_SM_NON_FATAL_ERROR_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_UFPCI_CONFIG_0
#define SATA_UFPCI_CONFIG_0                     _MK_ADDR_CONST(0x19c)
#define SATA_UFPCI_CONFIG_0_SECURE                      0x0
#define SATA_UFPCI_CONFIG_0_DUAL                        0x0
#define SATA_UFPCI_CONFIG_0_SCR                         0
#define SATA_UFPCI_CONFIG_0_WORD_COUNT                  0x1
#define SATA_UFPCI_CONFIG_0_RESET_VAL                   _MK_MASK_CONST(0x2)
#define SATA_UFPCI_CONFIG_0_RESET_MASK                  _MK_MASK_CONST(0x1f)
#define SATA_UFPCI_CONFIG_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define SATA_UFPCI_CONFIG_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_UFPCI_CONFIG_0_READ_MASK                   _MK_MASK_CONST(0x1f)
#define SATA_UFPCI_CONFIG_0_WRITE_MASK                  _MK_MASK_CONST(0x1f)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_SHIFT                   _MK_SHIFT_CONST(0)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_FIELD                   _MK_FIELD_CONST(0x1f, SATA_UFPCI_CONFIG_0_UNITID_T0C0_SHIFT)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_RANGE                   4:0
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_WOFFSET                 0x0
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_DEFAULT                 _MK_MASK_CONST(0x2)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_DEFAULT_MASK                    _MK_MASK_CONST(0x1f)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_UFPCI_CONFIG_0_UNITID_T0C0_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register SATA_CFG_REVID_0
#define SATA_CFG_REVID_0                        _MK_ADDR_CONST(0x1a0)
#define SATA_CFG_REVID_0_SECURE                         0x0
#define SATA_CFG_REVID_0_DUAL                   0x0
#define SATA_CFG_REVID_0_SCR                    0
#define SATA_CFG_REVID_0_WORD_COUNT                     0x1
#define SATA_CFG_REVID_0_RESET_VAL                      _MK_MASK_CONST(0x1004)
#define SATA_CFG_REVID_0_RESET_MASK                     _MK_MASK_CONST(0xc3c1c)
#define SATA_CFG_REVID_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_READ_MASK                      _MK_MASK_CONST(0xc3c1c)
#define SATA_CFG_REVID_0_WRITE_MASK                     _MK_MASK_CONST(0x3c04)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_SHIFT                   _MK_SHIFT_CONST(2)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_FIELD                   _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_SHIFT)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_RANGE                   2:2
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_WOFFSET                 0x0
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_DEFAULT                 _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_DISABLE                 _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_SM2DEV_FPCI_TIMEOUT_EN_ENABLE                  _MK_ENUM_CONST(1)

#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_SHIFT                 _MK_SHIFT_CONST(3)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_FIELD                 _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_SHIFT)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_RANGE                 3:3
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_WOFFSET                       0x0
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_NO                    _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_DEV2LEG_COH_REQUEST_PEND_YES                   _MK_ENUM_CONST(1)

#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_SHIFT                      _MK_SHIFT_CONST(4)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_FIELD                      _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_SHIFT)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_RANGE                      4:4
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_WOFFSET                    0x0
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_NO                 _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_DEV2LEG_NONCOH_REQUEST_PEND_YES                        _MK_ENUM_CONST(1)

#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_SHIFT                       _MK_SHIFT_CONST(10)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_FIELD                       _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_SHIFT)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_RANGE                       10:10
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_WOFFSET                     0x0
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_DISABLE                     _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_CFG_REVID_OVERRIDE_ENABLE                      _MK_ENUM_CONST(1)

#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_SHIFT                   _MK_SHIFT_CONST(11)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_FIELD                   _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_SHIFT)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_RANGE                   11:11
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_WOFFSET                 0x0
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_CLEAR                   _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_CFG_REVID_WRITE_ENABLE_SET                     _MK_ENUM_CONST(1)

#define SATA_CFG_REVID_0_STRAP_CPU_MODE_SHIFT                   _MK_SHIFT_CONST(12)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_FIELD                   _MK_FIELD_CONST(0x3, SATA_CFG_REVID_0_STRAP_CPU_MODE_SHIFT)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_RANGE                   13:12
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_WOFFSET                 0x0
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_DEFAULT                 _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_DEFAULT_MASK                    _MK_MASK_CONST(0x3)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_NB_INTEL                        _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_NB_AMD                  _MK_ENUM_CONST(1)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_AMD                     _MK_ENUM_CONST(2)
#define SATA_CFG_REVID_0_STRAP_CPU_MODE_TMTA                    _MK_ENUM_CONST(3)

#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_SHIFT                  _MK_SHIFT_CONST(18)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_FIELD                  _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_SHIFT)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_RANGE                  18:18
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_WOFFSET                        0x0
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_NO                     _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_DEV2SM_ISO_REQUEST_PEND_YES                    _MK_ENUM_CONST(1)

#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_SHIFT                       _MK_SHIFT_CONST(19)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_FIELD                       _MK_FIELD_CONST(0x1, SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_SHIFT)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_RANGE                       19:19
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_WOFFSET                     0x0
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_NO                  _MK_ENUM_CONST(0)
#define SATA_CFG_REVID_0_DEV2SM_NONISO_REQUEST_PEND_YES                 _MK_ENUM_CONST(1)


// Register SATA_FPCI_TIMEOUT_0
#define SATA_FPCI_TIMEOUT_0                     _MK_ADDR_CONST(0x1a4)
#define SATA_FPCI_TIMEOUT_0_SECURE                      0x0
#define SATA_FPCI_TIMEOUT_0_DUAL                        0x0
#define SATA_FPCI_TIMEOUT_0_SCR                         0
#define SATA_FPCI_TIMEOUT_0_WORD_COUNT                  0x1
#define SATA_FPCI_TIMEOUT_0_RESET_VAL                   _MK_MASK_CONST(0xf0000)
#define SATA_FPCI_TIMEOUT_0_RESET_MASK                  _MK_MASK_CONST(0xfffff)
#define SATA_FPCI_TIMEOUT_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define SATA_FPCI_TIMEOUT_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_FPCI_TIMEOUT_0_READ_MASK                   _MK_MASK_CONST(0xfffff)
#define SATA_FPCI_TIMEOUT_0_WRITE_MASK                  _MK_MASK_CONST(0xfffff)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_FIELD                    _MK_FIELD_CONST(0xfffff, SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_SHIFT)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_RANGE                    19:0
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_WOFFSET                  0x0
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_DEFAULT                  _MK_MASK_CONST(0xf0000)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_DEFAULT_MASK                     _MK_MASK_CONST(0xfffff)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_FPCI_TIMEOUT_0_SM2ALL_FPCI_TIMEOUT_THRESH_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_TOM_0
#define SATA_TOM_0                      _MK_ADDR_CONST(0x1a8)
#define SATA_TOM_0_SECURE                       0x0
#define SATA_TOM_0_DUAL                         0x0
#define SATA_TOM_0_SCR                  0
#define SATA_TOM_0_WORD_COUNT                   0x1
#define SATA_TOM_0_RESET_VAL                    _MK_MASK_CONST(0x3fff0fff)
#define SATA_TOM_0_RESET_MASK                   _MK_MASK_CONST(0x3fff0fff)
#define SATA_TOM_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_TOM_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_TOM_0_READ_MASK                    _MK_MASK_CONST(0x3fff0fff)
#define SATA_TOM_0_WRITE_MASK                   _MK_MASK_CONST(0x3fff0fff)
#define SATA_TOM_0_LEG2ALL_TOM1_SHIFT                   _MK_SHIFT_CONST(0)
#define SATA_TOM_0_LEG2ALL_TOM1_FIELD                   _MK_FIELD_CONST(0xfff, SATA_TOM_0_LEG2ALL_TOM1_SHIFT)
#define SATA_TOM_0_LEG2ALL_TOM1_RANGE                   11:0
#define SATA_TOM_0_LEG2ALL_TOM1_WOFFSET                 0x0
#define SATA_TOM_0_LEG2ALL_TOM1_DEFAULT                 _MK_MASK_CONST(0xfff)
#define SATA_TOM_0_LEG2ALL_TOM1_DEFAULT_MASK                    _MK_MASK_CONST(0xfff)
#define SATA_TOM_0_LEG2ALL_TOM1_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_TOM_0_LEG2ALL_TOM1_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_TOM_0_LEG2ALL_TOM1_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_TOM_0_LEG2ALL_TOM1_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)

#define SATA_TOM_0_LEG2ALL_TOM2_SHIFT                   _MK_SHIFT_CONST(16)
#define SATA_TOM_0_LEG2ALL_TOM2_FIELD                   _MK_FIELD_CONST(0x3fff, SATA_TOM_0_LEG2ALL_TOM2_SHIFT)
#define SATA_TOM_0_LEG2ALL_TOM2_RANGE                   29:16
#define SATA_TOM_0_LEG2ALL_TOM2_WOFFSET                 0x0
#define SATA_TOM_0_LEG2ALL_TOM2_DEFAULT                 _MK_MASK_CONST(0x3fff)
#define SATA_TOM_0_LEG2ALL_TOM2_DEFAULT_MASK                    _MK_MASK_CONST(0x3fff)
#define SATA_TOM_0_LEG2ALL_TOM2_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_TOM_0_LEG2ALL_TOM2_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_TOM_0_LEG2ALL_TOM2_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_TOM_0_LEG2ALL_TOM2_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register SATA_INITIATOR_ISO_PW_RESP_PENDING_0
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0                    _MK_ADDR_CONST(0x1ac)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_SECURE                     0x0
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_DUAL                       0x0
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_SCR                        0
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_WORD_COUNT                         0x1
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_RESET_MASK                         _MK_MASK_CONST(0xff)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_READ_MASK                  _MK_MASK_CONST(0xff)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_WRITE_MASK                         _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_FIELD                       _MK_FIELD_CONST(0xff, SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_SHIFT)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_RANGE                       7:0
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_WOFFSET                     0x0
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_DEFAULT_MASK                        _MK_MASK_CONST(0xff)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_ISO_PW_RESP_PENDING_0_NUM_INITIATOR_ISO_PW_RESP_PEND_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_INITIATOR_NISO_PW_RESP_PENDING_0
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0                   _MK_ADDR_CONST(0x1b0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_SECURE                    0x0
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_DUAL                      0x0
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_SCR                       0
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_WORD_COUNT                        0x1
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_RESET_MASK                        _MK_MASK_CONST(0xff)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_READ_MASK                         _MK_MASK_CONST(0xff)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_WRITE_MASK                        _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_SHIFT                     _MK_SHIFT_CONST(0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_FIELD                     _MK_FIELD_CONST(0xff, SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_SHIFT)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_RANGE                     7:0
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_WOFFSET                   0x0
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_DEFAULT_MASK                      _MK_MASK_CONST(0xff)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_INITIATOR_NISO_PW_RESP_PENDING_0_NUM_INITIATOR_NISO_PW_RESP_PEND_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register SATA_INTR_STATUS_0
#define SATA_INTR_STATUS_0                      _MK_ADDR_CONST(0x1b4)
#define SATA_INTR_STATUS_0_SECURE                       0x0
#define SATA_INTR_STATUS_0_DUAL                         0x0
#define SATA_INTR_STATUS_0_SCR                  0
#define SATA_INTR_STATUS_0_WORD_COUNT                   0x1
#define SATA_INTR_STATUS_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_RESET_MASK                   _MK_MASK_CONST(0x7)
#define SATA_INTR_STATUS_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_READ_MASK                    _MK_MASK_CONST(0x7)
#define SATA_INTR_STATUS_0_WRITE_MASK                   _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_SHIFT                       _MK_SHIFT_CONST(0)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_FIELD                       _MK_FIELD_CONST(0x1, SATA_INTR_STATUS_0_IPFS_INTR_STATUS_SHIFT)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_RANGE                       0:0
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_WOFFSET                     0x0
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IPFS_INTR_STATUS_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_SHIFT                        _MK_SHIFT_CONST(1)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_FIELD                        _MK_FIELD_CONST(0x1, SATA_INTR_STATUS_0_MSI_INTR_STATUS_SHIFT)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_RANGE                        1:1
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_WOFFSET                      0x0
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_MSI_INTR_STATUS_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define SATA_INTR_STATUS_0_IP_INTR_STATUS_SHIFT                 _MK_SHIFT_CONST(2)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_FIELD                 _MK_FIELD_CONST(0x1, SATA_INTR_STATUS_0_IP_INTR_STATUS_SHIFT)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_RANGE                 2:2
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_WOFFSET                       0x0
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_INTR_STATUS_0_IP_INTR_STATUS_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Register SATA_DFPCI_BEN_0
#define SATA_DFPCI_BEN_0                        _MK_ADDR_CONST(0x1b8)
#define SATA_DFPCI_BEN_0_SECURE                         0x0
#define SATA_DFPCI_BEN_0_DUAL                   0x0
#define SATA_DFPCI_BEN_0_SCR                    0
#define SATA_DFPCI_BEN_0_WORD_COUNT                     0x1
#define SATA_DFPCI_BEN_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_RESET_MASK                     _MK_MASK_CONST(0x8000000f)
#define SATA_DFPCI_BEN_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_READ_MASK                      _MK_MASK_CONST(0x8000000f)
#define SATA_DFPCI_BEN_0_WRITE_MASK                     _MK_MASK_CONST(0x8000000f)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_SHIFT                     _MK_SHIFT_CONST(31)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_FIELD                     _MK_FIELD_CONST(0x1, SATA_DFPCI_BEN_0_EN_DFPCI_BEN_SHIFT)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_RANGE                     31:31
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_WOFFSET                   0x0
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_EN_DFPCI_BEN_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_SHIFT                      _MK_SHIFT_CONST(0)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_FIELD                      _MK_FIELD_CONST(0xf, SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_SHIFT)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_RANGE                      3:0
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_WOFFSET                    0x0
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_DEFAULT_MASK                       _MK_MASK_CONST(0xf)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_DFPCI_BEN_0_DFPCI_BYTE_ENABLE_N_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_CLKGATE_HYSTERESIS_0
#define SATA_CLKGATE_HYSTERESIS_0                       _MK_ADDR_CONST(0x1bc)
#define SATA_CLKGATE_HYSTERESIS_0_SECURE                        0x0
#define SATA_CLKGATE_HYSTERESIS_0_DUAL                  0x0
#define SATA_CLKGATE_HYSTERESIS_0_SCR                   0
#define SATA_CLKGATE_HYSTERESIS_0_WORD_COUNT                    0x1
#define SATA_CLKGATE_HYSTERESIS_0_RESET_VAL                     _MK_MASK_CONST(0x14)
#define SATA_CLKGATE_HYSTERESIS_0_RESET_MASK                    _MK_MASK_CONST(0xff)
#define SATA_CLKGATE_HYSTERESIS_0_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define SATA_CLKGATE_HYSTERESIS_0_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CLKGATE_HYSTERESIS_0_READ_MASK                     _MK_MASK_CONST(0xff)
#define SATA_CLKGATE_HYSTERESIS_0_WRITE_MASK                    _MK_MASK_CONST(0xff)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_SHIFT                 _MK_SHIFT_CONST(0)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_FIELD                 _MK_FIELD_CONST(0xff, SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_SHIFT)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_RANGE                 7:0
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_WOFFSET                       0x0
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_DEFAULT                       _MK_MASK_CONST(0x14)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_DEFAULT_MASK                  _MK_MASK_CONST(0xff)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_CLKGATE_HYSTERESIS_0_CLK_DISABLE_CNT_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Reserved address 0x1c0

// Reserved address 0x1c4

// Reserved address 0x1c8

// Reserved address 0x1cc

// Reserved address 0x1d0

// Reserved address 0x1d4

// Register SATA_SPARE_REG0_0
#define SATA_SPARE_REG0_0                       _MK_ADDR_CONST(0x1d8)
#define SATA_SPARE_REG0_0_SECURE                        0x0
#define SATA_SPARE_REG0_0_DUAL                  0x0
#define SATA_SPARE_REG0_0_SCR                   0
#define SATA_SPARE_REG0_0_WORD_COUNT                    0x1
#define SATA_SPARE_REG0_0_RESET_VAL                     _MK_MASK_CONST(0xffff0000)
#define SATA_SPARE_REG0_0_RESET_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_SPARE_REG0_0_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define SATA_SPARE_REG0_0_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_SPARE_REG0_0_READ_MASK                     _MK_MASK_CONST(0xffffffff)
#define SATA_SPARE_REG0_0_WRITE_MASK                    _MK_MASK_CONST(0xffffffff)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_SHIFT                  _MK_SHIFT_CONST(0)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_FIELD                  _MK_FIELD_CONST(0xffffffff, SATA_SPARE_REG0_0_IPFS_SPARE_REG_SHIFT)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_RANGE                  31:0
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_WOFFSET                        0x0
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_DEFAULT                        _MK_MASK_CONST(0xffff0000)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define SATA_SPARE_REG0_0_IPFS_SPARE_REG_INIT_ENUM                      -65536


// Register SATA_ORDERING_RULES_0
#define SATA_ORDERING_RULES_0                   _MK_ADDR_CONST(0x1dc)
#define SATA_ORDERING_RULES_0_SECURE                    0x0
#define SATA_ORDERING_RULES_0_DUAL                      0x0
#define SATA_ORDERING_RULES_0_SCR                       0
#define SATA_ORDERING_RULES_0_WORD_COUNT                        0x1
#define SATA_ORDERING_RULES_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_RESET_MASK                        _MK_MASK_CONST(0xe)
#define SATA_ORDERING_RULES_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_READ_MASK                         _MK_MASK_CONST(0xe)
#define SATA_ORDERING_RULES_0_WRITE_MASK                        _MK_MASK_CONST(0xe)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_SHIFT                        _MK_SHIFT_CONST(1)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_FIELD                        _MK_FIELD_CONST(0x1, SATA_ORDERING_RULES_0_UPSTREAM_RAW_SHIFT)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_RANGE                        1:1
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_WOFFSET                      0x0
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RAW_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_SHIFT                     _MK_SHIFT_CONST(2)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_FIELD                     _MK_FIELD_CONST(0x1, SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_SHIFT)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_RANGE                     2:2
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_WOFFSET                   0x0
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_RESPAW_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_SHIFT                      _MK_SHIFT_CONST(3)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_FIELD                      _MK_FIELD_CONST(0x1, SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_SHIFT)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_RANGE                      3:3
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_WOFFSET                    0x0
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define SATA_ORDERING_RULES_0_UPSTREAM_MSIAW_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register SATA_A2F_UFPCI_CFG0_0
#define SATA_A2F_UFPCI_CFG0_0                   _MK_ADDR_CONST(0x1e0)
#define SATA_A2F_UFPCI_CFG0_0_SECURE                    0x0
#define SATA_A2F_UFPCI_CFG0_0_DUAL                      0x0
#define SATA_A2F_UFPCI_CFG0_0_SCR                       0
#define SATA_A2F_UFPCI_CFG0_0_WORD_COUNT                        0x1
#define SATA_A2F_UFPCI_CFG0_0_RESET_VAL                         _MK_MASK_CONST(0x50)
#define SATA_A2F_UFPCI_CFG0_0_RESET_MASK                        _MK_MASK_CONST(0xff07ffff)
#define SATA_A2F_UFPCI_CFG0_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_READ_MASK                         _MK_MASK_CONST(0xff07ffff)
#define SATA_A2F_UFPCI_CFG0_0_WRITE_MASK                        _MK_MASK_CONST(0xff07ffff)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_SHIFT                 _MK_SHIFT_CONST(0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_FIELD                 _MK_FIELD_CONST(0x1, SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_RANGE                 0:0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_WOFFSET                       0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_SHIFT                  _MK_SHIFT_CONST(1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_FIELD                  _MK_FIELD_CONST(0x1, SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_RANGE                  1:1
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_WOFFSET                        0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_DEFAULT                        _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_CYA_UFA_ARB_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_SHIFT                    _MK_SHIFT_CONST(2)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_FIELD                    _MK_FIELD_CONST(0x7, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_RANGE                    4:2
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_WOFFSET                  0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_DEFAULT                  _MK_MASK_CONST(0x4)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_DEFAULT_MASK                     _MK_MASK_CONST(0x7)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_BLOCK_CMD_THRESHOLD_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_SHIFT                       _MK_SHIFT_CONST(5)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_FIELD                       _MK_FIELD_CONST(0x1, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_RANGE                       5:5
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_WOFFSET                     0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_BLK_COHERENT_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_SHIFT                       _MK_SHIFT_CONST(6)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_FIELD                       _MK_FIELD_CONST(0x1, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_RANGE                       6:6
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_WOFFSET                     0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_DEFAULT                     _MK_MASK_CONST(0x1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_DYN_BLOCK_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_SHIFT                        _MK_SHIFT_CONST(7)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_FIELD                        _MK_FIELD_CONST(0x1, SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_RANGE                        7:7
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_WOFFSET                      0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_CLAMP_EN_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_SHIFT                       _MK_SHIFT_CONST(8)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_FIELD                       _MK_FIELD_CONST(0x3, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_RANGE                       9:8
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_WOFFSET                     0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_DEFAULT_MASK                        _MK_MASK_CONST(0x3)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI0_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_SHIFT                       _MK_SHIFT_CONST(10)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_FIELD                       _MK_FIELD_CONST(0x3, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_RANGE                       11:10
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_WOFFSET                     0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_DEFAULT_MASK                        _MK_MASK_CONST(0x3)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_RR_BURST_SZ_PRI1_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_SHIFT                   _MK_SHIFT_CONST(12)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_FIELD                   _MK_FIELD_CONST(0xf, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_RANGE                   15:12
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_WOFFSET                 0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_DEFAULT_MASK                    _MK_MASK_CONST(0xf)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI0_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_SHIFT                   _MK_SHIFT_CONST(16)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_FIELD                   _MK_FIELD_CONST(0x7, SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_RANGE                   18:16
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_WOFFSET                 0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_DEFAULT                 _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_DEFAULT_MASK                    _MK_MASK_CONST(0x7)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_UFPCI_UFA_STARVE_CNTR_PRI1_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)

#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_SHIFT                       _MK_SHIFT_CONST(24)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_FIELD                       _MK_FIELD_CONST(0xff, SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_SHIFT)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_RANGE                       31:24
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_WOFFSET                     0x0
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_DEFAULT                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_DEFAULT_MASK                        _MK_MASK_CONST(0xff)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG0_0_STATIC_WAIT_IDLE_CNTR_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register SATA_A2F_UFPCI_CFG1_0
#define SATA_A2F_UFPCI_CFG1_0                   _MK_ADDR_CONST(0x1e4)
#define SATA_A2F_UFPCI_CFG1_0_SECURE                    0x0
#define SATA_A2F_UFPCI_CFG1_0_DUAL                      0x0
#define SATA_A2F_UFPCI_CFG1_0_SCR                       0
#define SATA_A2F_UFPCI_CFG1_0_WORD_COUNT                        0x1
#define SATA_A2F_UFPCI_CFG1_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_RESET_MASK                        _MK_MASK_CONST(0xff)
#define SATA_A2F_UFPCI_CFG1_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_READ_MASK                         _MK_MASK_CONST(0xff)
#define SATA_A2F_UFPCI_CFG1_0_WRITE_MASK                        _MK_MASK_CONST(0xff)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_FIELD                    _MK_FIELD_CONST(0xff, SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_SHIFT)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_RANGE                    7:0
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_WOFFSET                  0x0
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_DEFAULT_MASK                     _MK_MASK_CONST(0xff)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_A2F_UFPCI_CFG1_0_STATIC_WAIT_UNCLAMP_CNTR_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register SATA_DUMMY_REG_0
#define SATA_DUMMY_REG_0                        _MK_ADDR_CONST(0x1e8)
#define SATA_DUMMY_REG_0_SECURE                         0x0
#define SATA_DUMMY_REG_0_DUAL                   0x0
#define SATA_DUMMY_REG_0_SCR                    0
#define SATA_DUMMY_REG_0_WORD_COUNT                     0x1
#define SATA_DUMMY_REG_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_RESET_MASK                     _MK_MASK_CONST(0x1)
#define SATA_DUMMY_REG_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_READ_MASK                      _MK_MASK_CONST(0x1)
#define SATA_DUMMY_REG_0_WRITE_MASK                     _MK_MASK_CONST(0x1)
#define SATA_DUMMY_REG_0_DUMMY_SHIFT                    _MK_SHIFT_CONST(0)
#define SATA_DUMMY_REG_0_DUMMY_FIELD                    _MK_FIELD_CONST(0x1, SATA_DUMMY_REG_0_DUMMY_SHIFT)
#define SATA_DUMMY_REG_0_DUMMY_RANGE                    0:0
#define SATA_DUMMY_REG_0_DUMMY_WOFFSET                  0x0
#define SATA_DUMMY_REG_0_DUMMY_DEFAULT                  _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_DUMMY_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define SATA_DUMMY_REG_0_DUMMY_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_DUMMY_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_DUMMY_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define SATA_DUMMY_REG_0_DUMMY_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


//
// REGISTER LIST
//
#define LIST_ARSATA_REGS(_op_) \
_op_(SATA_AXI_BAR0_SZ_0) \
_op_(SATA_AXI_BAR1_SZ_0) \
_op_(SATA_AXI_BAR2_SZ_0) \
_op_(SATA_AXI_BAR3_SZ_0) \
_op_(SATA_AXI_BAR4_SZ_0) \
_op_(SATA_AXI_BAR5_SZ_0) \
_op_(SATA_AXI_BAR6_SZ_0) \
_op_(SATA_AXI_BAR7_SZ_0) \
_op_(SATA_AXI_BAR0_START_0) \
_op_(SATA_AXI_BAR1_START_0) \
_op_(SATA_AXI_BAR2_START_0) \
_op_(SATA_AXI_BAR3_START_0) \
_op_(SATA_AXI_BAR4_START_0) \
_op_(SATA_AXI_BAR5_START_0) \
_op_(SATA_AXI_BAR6_START_0) \
_op_(SATA_AXI_BAR7_START_0) \
_op_(SATA_FPCI_BAR0_0) \
_op_(SATA_FPCI_BAR1_0) \
_op_(SATA_FPCI_BAR2_0) \
_op_(SATA_FPCI_BAR3_0) \
_op_(SATA_FPCI_BAR4_0) \
_op_(SATA_FPCI_BAR5_0) \
_op_(SATA_FPCI_BAR6_0) \
_op_(SATA_FPCI_BAR7_0) \
_op_(SATA_MSI_BAR_SZ_0) \
_op_(SATA_MSI_AXI_BAR_ST_0) \
_op_(SATA_MSI_FPCI_BAR_ST_0) \
_op_(SATA_MSI_VEC0_0) \
_op_(SATA_MSI_VEC1_0) \
_op_(SATA_MSI_VEC2_0) \
_op_(SATA_MSI_VEC3_0) \
_op_(SATA_MSI_VEC4_0) \
_op_(SATA_MSI_VEC5_0) \
_op_(SATA_MSI_VEC6_0) \
_op_(SATA_MSI_VEC7_0) \
_op_(SATA_MSI_EN_VEC0_0) \
_op_(SATA_MSI_EN_VEC1_0) \
_op_(SATA_MSI_EN_VEC2_0) \
_op_(SATA_MSI_EN_VEC3_0) \
_op_(SATA_MSI_EN_VEC4_0) \
_op_(SATA_MSI_EN_VEC5_0) \
_op_(SATA_MSI_EN_VEC6_0) \
_op_(SATA_MSI_EN_VEC7_0) \
_op_(SATA_CONFIGURATION_0) \
_op_(SATA_FPCI_ERROR_MASKS_0) \
_op_(SATA_INTR_MASK_0) \
_op_(SATA_INTR_CODE_0) \
_op_(SATA_INTR_SIGNATURE_0) \
_op_(SATA_UPPER_FPCI_ADDR_0) \
_op_(SATA_IPFS_INTR_ENABLE_0) \
_op_(SATA_UFPCI_CONFIG_0) \
_op_(SATA_CFG_REVID_0) \
_op_(SATA_FPCI_TIMEOUT_0) \
_op_(SATA_TOM_0) \
_op_(SATA_INITIATOR_ISO_PW_RESP_PENDING_0) \
_op_(SATA_INITIATOR_NISO_PW_RESP_PENDING_0) \
_op_(SATA_INTR_STATUS_0) \
_op_(SATA_DFPCI_BEN_0) \
_op_(SATA_CLKGATE_HYSTERESIS_0) \
_op_(SATA_SPARE_REG0_0) \
_op_(SATA_ORDERING_RULES_0) \
_op_(SATA_A2F_UFPCI_CFG0_0) \
_op_(SATA_A2F_UFPCI_CFG1_0) \
_op_(SATA_DUMMY_REG_0)


//
// ADDRESS SPACES
//

#define BASE_ADDRESS_SATA       0x00000000

//
// ARSATA REGISTER BANKS
//

#define SATA0_FIRST_REG 0x0000 // SATA_AXI_BAR0_SZ_0
#define SATA0_LAST_REG 0x001c // SATA_AXI_BAR7_SZ_0
#define SATA1_FIRST_REG 0x0040 // SATA_AXI_BAR0_START_0
#define SATA1_LAST_REG 0x005c // SATA_AXI_BAR7_START_0
#define SATA2_FIRST_REG 0x0080 // SATA_FPCI_BAR0_0
#define SATA2_LAST_REG 0x009c // SATA_FPCI_BAR7_0
#define SATA3_FIRST_REG 0x00c0 // SATA_MSI_BAR_SZ_0
#define SATA3_LAST_REG 0x00c8 // SATA_MSI_FPCI_BAR_ST_0
#define SATA4_FIRST_REG 0x0100 // SATA_MSI_VEC0_0
#define SATA4_LAST_REG 0x011c // SATA_MSI_VEC7_0
#define SATA5_FIRST_REG 0x0140 // SATA_MSI_EN_VEC0_0
#define SATA5_LAST_REG 0x015c // SATA_MSI_EN_VEC7_0
#define SATA6_FIRST_REG 0x0180 // SATA_CONFIGURATION_0
#define SATA6_LAST_REG 0x01bc // SATA_CLKGATE_HYSTERESIS_0
#define SATA7_FIRST_REG 0x01d8 // SATA_SPARE_REG0_0
#define SATA7_LAST_REG 0x01e8 // SATA_DUMMY_REG_0

// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif

#endif // ifndef ___ARSATA_H_INC_
