//
// Copyright (c) 2018 NVIDIA Corporation.
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// Neither the name of the NVIDIA Corporation nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//

//
// DO NOT EDIT - generated by simspec!
//

#ifndef ___ARGTE_APS_H_INC_
#define ___ARGTE_APS_H_INC_
#define NV_MOBILE_ARGTE_APS_H_UNIT_OF_OFFSET 1B


// Register GTE_APS_TECTRL_0
#define GTE_APS_TECTRL_0                        _MK_ADDR_CONST(0x0)
#define GTE_APS_TECTRL_0_SECURE                         0x0
#define GTE_APS_TECTRL_0_DUAL                   0x0
#define GTE_APS_TECTRL_0_SCR                    TESCR_0
#define GTE_APS_TECTRL_0_WORD_COUNT                     0x1
#define GTE_APS_TECTRL_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_RESET_MASK                     _MK_MASK_CONST(0xff37)
#define GTE_APS_TECTRL_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_READ_MASK                      _MK_MASK_CONST(0xff37)
#define GTE_APS_TECTRL_0_WRITE_MASK                     _MK_MASK_CONST(0xff37)
#define GTE_APS_TECTRL_0_ENABLE_SHIFT                   _MK_SHIFT_CONST(0)
#define GTE_APS_TECTRL_0_ENABLE_FIELD                   _MK_FIELD_CONST(0x1, GTE_APS_TECTRL_0_ENABLE_SHIFT)
#define GTE_APS_TECTRL_0_ENABLE_RANGE                   0:0
#define GTE_APS_TECTRL_0_ENABLE_WOFFSET                 0x0
#define GTE_APS_TECTRL_0_ENABLE_DEFAULT                 _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_ENABLE_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define GTE_APS_TECTRL_0_ENABLE_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_ENABLE_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_ENABLE_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_ENABLE_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)
#define GTE_APS_TECTRL_0_ENABLE_DISABLE                 _MK_ENUM_CONST(0)
#define GTE_APS_TECTRL_0_ENABLE_ENABLE                  _MK_ENUM_CONST(1)

#define GTE_APS_TECTRL_0_INTERRUPTENABLE_SHIFT                  _MK_SHIFT_CONST(1)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_FIELD                  _MK_FIELD_CONST(0x1, GTE_APS_TECTRL_0_INTERRUPTENABLE_SHIFT)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_RANGE                  1:1
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_WOFFSET                        0x0
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_DEFAULT                        _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_DISABLE                        _MK_ENUM_CONST(0)
#define GTE_APS_TECTRL_0_INTERRUPTENABLE_ENABLE                 _MK_ENUM_CONST(1)

#define GTE_APS_TECTRL_0_AUTOADVENABLE_SHIFT                    _MK_SHIFT_CONST(2)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_FIELD                    _MK_FIELD_CONST(0x1, GTE_APS_TECTRL_0_AUTOADVENABLE_SHIFT)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_RANGE                    2:2
#define GTE_APS_TECTRL_0_AUTOADVENABLE_WOFFSET                  0x0
#define GTE_APS_TECTRL_0_AUTOADVENABLE_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_DISABLE                  _MK_ENUM_CONST(0)
#define GTE_APS_TECTRL_0_AUTOADVENABLE_ENABLE                   _MK_ENUM_CONST(1)

#define GTE_APS_TECTRL_0_AUTOADVADDR_SHIFT                      _MK_SHIFT_CONST(4)
#define GTE_APS_TECTRL_0_AUTOADVADDR_FIELD                      _MK_FIELD_CONST(0x3, GTE_APS_TECTRL_0_AUTOADVADDR_SHIFT)
#define GTE_APS_TECTRL_0_AUTOADVADDR_RANGE                      5:4
#define GTE_APS_TECTRL_0_AUTOADVADDR_WOFFSET                    0x0
#define GTE_APS_TECTRL_0_AUTOADVADDR_DEFAULT                    _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVADDR_DEFAULT_MASK                       _MK_MASK_CONST(0x3)
#define GTE_APS_TECTRL_0_AUTOADVADDR_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVADDR_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVADDR_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_AUTOADVADDR_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_SHIFT                       _MK_SHIFT_CONST(8)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_FIELD                       _MK_FIELD_CONST(0xff, GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_SHIFT)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_RANGE                       15:8
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_WOFFSET                     0x0
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_DEFAULT_MASK                        _MK_MASK_CONST(0xff)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_TECTRL_0_OCCUPANCYTHRESHOLD_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register GTE_APS_TETSCH_0
#define GTE_APS_TETSCH_0                        _MK_ADDR_CONST(0x4)
#define GTE_APS_TETSCH_0_SECURE                         0x0
#define GTE_APS_TETSCH_0_DUAL                   0x0
#define GTE_APS_TETSCH_0_SCR                    TESCR_0
#define GTE_APS_TETSCH_0_WORD_COUNT                     0x1
#define GTE_APS_TETSCH_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_RESET_MASK                     _MK_MASK_CONST(0xffffff)
#define GTE_APS_TETSCH_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_READ_MASK                      _MK_MASK_CONST(0xffffff)
#define GTE_APS_TETSCH_0_WRITE_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_VAL_SHIFT                      _MK_SHIFT_CONST(0)
#define GTE_APS_TETSCH_0_VAL_FIELD                      _MK_FIELD_CONST(0xffffff, GTE_APS_TETSCH_0_VAL_SHIFT)
#define GTE_APS_TETSCH_0_VAL_RANGE                      23:0
#define GTE_APS_TETSCH_0_VAL_WOFFSET                    0x0
#define GTE_APS_TETSCH_0_VAL_DEFAULT                    _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_VAL_DEFAULT_MASK                       _MK_MASK_CONST(0xffffff)
#define GTE_APS_TETSCH_0_VAL_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_VAL_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_VAL_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCH_0_VAL_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register GTE_APS_TETSCL_0
#define GTE_APS_TETSCL_0                        _MK_ADDR_CONST(0x8)
#define GTE_APS_TETSCL_0_SECURE                         0x0
#define GTE_APS_TETSCL_0_DUAL                   0x0
#define GTE_APS_TETSCL_0_SCR                    TESCR_0
#define GTE_APS_TETSCL_0_WORD_COUNT                     0x1
#define GTE_APS_TETSCL_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_RESET_MASK                     _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TETSCL_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_READ_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TETSCL_0_WRITE_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_VAL_SHIFT                      _MK_SHIFT_CONST(0)
#define GTE_APS_TETSCL_0_VAL_FIELD                      _MK_FIELD_CONST(0xffffffff, GTE_APS_TETSCL_0_VAL_SHIFT)
#define GTE_APS_TETSCL_0_VAL_RANGE                      31:0
#define GTE_APS_TETSCL_0_VAL_WOFFSET                    0x0
#define GTE_APS_TETSCL_0_VAL_DEFAULT                    _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_VAL_DEFAULT_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TETSCL_0_VAL_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_VAL_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_VAL_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define GTE_APS_TETSCL_0_VAL_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register GTE_APS_TESRC_0
#define GTE_APS_TESRC_0                 _MK_ADDR_CONST(0xc)
#define GTE_APS_TESRC_0_SECURE                  0x0
#define GTE_APS_TESRC_0_DUAL                    0x0
#define GTE_APS_TESRC_0_SCR                     TESCR_0
#define GTE_APS_TESRC_0_WORD_COUNT                      0x1
#define GTE_APS_TESRC_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TESRC_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TESRC_0_WRITE_MASK                      _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_TAG_SHIFT                       _MK_SHIFT_CONST(0)
#define GTE_APS_TESRC_0_TAG_FIELD                       _MK_FIELD_CONST(0xffff, GTE_APS_TESRC_0_TAG_SHIFT)
#define GTE_APS_TESRC_0_TAG_RANGE                       15:0
#define GTE_APS_TESRC_0_TAG_WOFFSET                     0x0
#define GTE_APS_TESRC_0_TAG_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_TAG_DEFAULT_MASK                        _MK_MASK_CONST(0xffff)
#define GTE_APS_TESRC_0_TAG_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_TAG_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_TAG_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_TAG_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define GTE_APS_TESRC_0_SLICE_SHIFT                     _MK_SHIFT_CONST(16)
#define GTE_APS_TESRC_0_SLICE_FIELD                     _MK_FIELD_CONST(0xff, GTE_APS_TESRC_0_SLICE_SHIFT)
#define GTE_APS_TESRC_0_SLICE_RANGE                     23:16
#define GTE_APS_TESRC_0_SLICE_WOFFSET                   0x0
#define GTE_APS_TESRC_0_SLICE_DEFAULT                   _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_SLICE_DEFAULT_MASK                      _MK_MASK_CONST(0xff)
#define GTE_APS_TESRC_0_SLICE_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_SLICE_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_SLICE_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_SLICE_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define GTE_APS_TESRC_0_MODULE_SHIFT                    _MK_SHIFT_CONST(24)
#define GTE_APS_TESRC_0_MODULE_FIELD                    _MK_FIELD_CONST(0xff, GTE_APS_TESRC_0_MODULE_SHIFT)
#define GTE_APS_TESRC_0_MODULE_RANGE                    31:24
#define GTE_APS_TESRC_0_MODULE_WOFFSET                  0x0
#define GTE_APS_TESRC_0_MODULE_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_MODULE_DEFAULT_MASK                     _MK_MASK_CONST(0xff)
#define GTE_APS_TESRC_0_MODULE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_MODULE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_MODULE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define GTE_APS_TESRC_0_MODULE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register GTE_APS_TECCV_0
#define GTE_APS_TECCV_0                 _MK_ADDR_CONST(0x10)
#define GTE_APS_TECCV_0_SECURE                  0x0
#define GTE_APS_TECCV_0_DUAL                    0x0
#define GTE_APS_TECCV_0_SCR                     TESCR_0
#define GTE_APS_TECCV_0_WORD_COUNT                      0x1
#define GTE_APS_TECCV_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TECCV_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TECCV_0_WRITE_MASK                      _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_VAL_SHIFT                       _MK_SHIFT_CONST(0)
#define GTE_APS_TECCV_0_VAL_FIELD                       _MK_FIELD_CONST(0xffffffff, GTE_APS_TECCV_0_VAL_SHIFT)
#define GTE_APS_TECCV_0_VAL_RANGE                       31:0
#define GTE_APS_TECCV_0_VAL_WOFFSET                     0x0
#define GTE_APS_TECCV_0_VAL_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_VAL_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TECCV_0_VAL_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_VAL_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_VAL_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_TECCV_0_VAL_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register GTE_APS_TEPCV_0
#define GTE_APS_TEPCV_0                 _MK_ADDR_CONST(0x14)
#define GTE_APS_TEPCV_0_SECURE                  0x0
#define GTE_APS_TEPCV_0_DUAL                    0x0
#define GTE_APS_TEPCV_0_SCR                     TESCR_0
#define GTE_APS_TEPCV_0_WORD_COUNT                      0x1
#define GTE_APS_TEPCV_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TEPCV_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TEPCV_0_WRITE_MASK                      _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_VAL_SHIFT                       _MK_SHIFT_CONST(0)
#define GTE_APS_TEPCV_0_VAL_FIELD                       _MK_FIELD_CONST(0xffffffff, GTE_APS_TEPCV_0_VAL_SHIFT)
#define GTE_APS_TEPCV_0_VAL_RANGE                       31:0
#define GTE_APS_TEPCV_0_VAL_WOFFSET                     0x0
#define GTE_APS_TEPCV_0_VAL_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_VAL_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define GTE_APS_TEPCV_0_VAL_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_VAL_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_VAL_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_TEPCV_0_VAL_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register GTE_APS_TEENCV_0
#define GTE_APS_TEENCV_0                        _MK_ADDR_CONST(0x18)
#define GTE_APS_TEENCV_0_SECURE                         0x0
#define GTE_APS_TEENCV_0_DUAL                   0x0
#define GTE_APS_TEENCV_0_SCR                    TESCR_0
#define GTE_APS_TEENCV_0_WORD_COUNT                     0x1
#define GTE_APS_TEENCV_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_RESET_MASK                     _MK_MASK_CONST(0x80011fff)
#define GTE_APS_TEENCV_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_READ_MASK                      _MK_MASK_CONST(0x80011fff)
#define GTE_APS_TEENCV_0_WRITE_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_BITINDEX_SHIFT                 _MK_SHIFT_CONST(0)
#define GTE_APS_TEENCV_0_BITINDEX_FIELD                 _MK_FIELD_CONST(0x1f, GTE_APS_TEENCV_0_BITINDEX_SHIFT)
#define GTE_APS_TEENCV_0_BITINDEX_RANGE                 4:0
#define GTE_APS_TEENCV_0_BITINDEX_WOFFSET                       0x0
#define GTE_APS_TEENCV_0_BITINDEX_DEFAULT                       _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_BITINDEX_DEFAULT_MASK                  _MK_MASK_CONST(0x1f)
#define GTE_APS_TEENCV_0_BITINDEX_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_BITINDEX_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_BITINDEX_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_BITINDEX_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define GTE_APS_TEENCV_0_SLICE_SHIFT                    _MK_SHIFT_CONST(5)
#define GTE_APS_TEENCV_0_SLICE_FIELD                    _MK_FIELD_CONST(0xff, GTE_APS_TEENCV_0_SLICE_SHIFT)
#define GTE_APS_TEENCV_0_SLICE_RANGE                    12:5
#define GTE_APS_TEENCV_0_SLICE_WOFFSET                  0x0
#define GTE_APS_TEENCV_0_SLICE_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_SLICE_DEFAULT_MASK                     _MK_MASK_CONST(0xff)
#define GTE_APS_TEENCV_0_SLICE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_SLICE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_SLICE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_SLICE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define GTE_APS_TEENCV_0_FALLING_SHIFT                  _MK_SHIFT_CONST(16)
#define GTE_APS_TEENCV_0_FALLING_FIELD                  _MK_FIELD_CONST(0x1, GTE_APS_TEENCV_0_FALLING_SHIFT)
#define GTE_APS_TEENCV_0_FALLING_RANGE                  16:16
#define GTE_APS_TEENCV_0_FALLING_WOFFSET                        0x0
#define GTE_APS_TEENCV_0_FALLING_DEFAULT                        _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_FALLING_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define GTE_APS_TEENCV_0_FALLING_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_FALLING_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_FALLING_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_FALLING_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define GTE_APS_TEENCV_0_INVALID_SHIFT                  _MK_SHIFT_CONST(31)
#define GTE_APS_TEENCV_0_INVALID_FIELD                  _MK_FIELD_CONST(0x1, GTE_APS_TEENCV_0_INVALID_SHIFT)
#define GTE_APS_TEENCV_0_INVALID_RANGE                  31:31
#define GTE_APS_TEENCV_0_INVALID_WOFFSET                        0x0
#define GTE_APS_TEENCV_0_INVALID_DEFAULT                        _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_INVALID_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define GTE_APS_TEENCV_0_INVALID_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_INVALID_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_INVALID_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define GTE_APS_TEENCV_0_INVALID_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register GTE_APS_TECMD_0
#define GTE_APS_TECMD_0                 _MK_ADDR_CONST(0x1c)
#define GTE_APS_TECMD_0_SECURE                  0x0
#define GTE_APS_TECMD_0_DUAL                    0x0
#define GTE_APS_TECMD_0_SCR                     TESCR_0
#define GTE_APS_TECMD_0_WORD_COUNT                      0x1
#define GTE_APS_TECMD_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_RESET_MASK                      _MK_MASK_CONST(0xf)
#define GTE_APS_TECMD_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_READ_MASK                       _MK_MASK_CONST(0xf)
#define GTE_APS_TECMD_0_WRITE_MASK                      _MK_MASK_CONST(0xf)
#define GTE_APS_TECMD_0_CMD_SHIFT                       _MK_SHIFT_CONST(0)
#define GTE_APS_TECMD_0_CMD_FIELD                       _MK_FIELD_CONST(0xf, GTE_APS_TECMD_0_CMD_SHIFT)
#define GTE_APS_TECMD_0_CMD_RANGE                       3:0
#define GTE_APS_TECMD_0_CMD_WOFFSET                     0x0
#define GTE_APS_TECMD_0_CMD_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_CMD_DEFAULT_MASK                        _MK_MASK_CONST(0xf)
#define GTE_APS_TECMD_0_CMD_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_CMD_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_CMD_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_TECMD_0_CMD_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define GTE_APS_TECMD_0_CMD_NOP                 _MK_ENUM_CONST(0)
#define GTE_APS_TECMD_0_CMD_POP                 _MK_ENUM_CONST(1)


// Register GTE_APS_TESTATUS_0
#define GTE_APS_TESTATUS_0                      _MK_ADDR_CONST(0x20)
#define GTE_APS_TESTATUS_0_SECURE                       0x0
#define GTE_APS_TESTATUS_0_DUAL                         0x0
#define GTE_APS_TESTATUS_0_SCR                  TESCR_0
#define GTE_APS_TESTATUS_0_WORD_COUNT                   0x1
#define GTE_APS_TESTATUS_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_RESET_MASK                   _MK_MASK_CONST(0xff02)
#define GTE_APS_TESTATUS_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_READ_MASK                    _MK_MASK_CONST(0xff02)
#define GTE_APS_TESTATUS_0_WRITE_MASK                   _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_INTERRUPT_SHIFT                      _MK_SHIFT_CONST(1)
#define GTE_APS_TESTATUS_0_INTERRUPT_FIELD                      _MK_FIELD_CONST(0x1, GTE_APS_TESTATUS_0_INTERRUPT_SHIFT)
#define GTE_APS_TESTATUS_0_INTERRUPT_RANGE                      1:1
#define GTE_APS_TESTATUS_0_INTERRUPT_WOFFSET                    0x0
#define GTE_APS_TESTATUS_0_INTERRUPT_DEFAULT                    _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_INTERRUPT_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define GTE_APS_TESTATUS_0_INTERRUPT_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_INTERRUPT_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_INTERRUPT_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_INTERRUPT_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define GTE_APS_TESTATUS_0_OCCUPANCY_SHIFT                      _MK_SHIFT_CONST(8)
#define GTE_APS_TESTATUS_0_OCCUPANCY_FIELD                      _MK_FIELD_CONST(0xff, GTE_APS_TESTATUS_0_OCCUPANCY_SHIFT)
#define GTE_APS_TESTATUS_0_OCCUPANCY_RANGE                      15:8
#define GTE_APS_TESTATUS_0_OCCUPANCY_WOFFSET                    0x0
#define GTE_APS_TESTATUS_0_OCCUPANCY_DEFAULT                    _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_OCCUPANCY_DEFAULT_MASK                       _MK_MASK_CONST(0xff)
#define GTE_APS_TESTATUS_0_OCCUPANCY_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_OCCUPANCY_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_OCCUPANCY_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define GTE_APS_TESTATUS_0_OCCUPANCY_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register GTE_APS_CLK_OVR_ON_0
#define GTE_APS_CLK_OVR_ON_0                    _MK_ADDR_CONST(0x24)
#define GTE_APS_CLK_OVR_ON_0_SECURE                     0x0
#define GTE_APS_CLK_OVR_ON_0_DUAL                       0x0
#define GTE_APS_CLK_OVR_ON_0_SCR                        TESCR_0
#define GTE_APS_CLK_OVR_ON_0_WORD_COUNT                         0x1
#define GTE_APS_CLK_OVR_ON_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_RESET_MASK                         _MK_MASK_CONST(0x1)
#define GTE_APS_CLK_OVR_ON_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_READ_MASK                  _MK_MASK_CONST(0x1)
#define GTE_APS_CLK_OVR_ON_0_WRITE_MASK                         _MK_MASK_CONST(0x1)
#define GTE_APS_CLK_OVR_ON_0_GTE_SHIFT                  _MK_SHIFT_CONST(0)
#define GTE_APS_CLK_OVR_ON_0_GTE_FIELD                  _MK_FIELD_CONST(0x1, GTE_APS_CLK_OVR_ON_0_GTE_SHIFT)
#define GTE_APS_CLK_OVR_ON_0_GTE_RANGE                  0:0
#define GTE_APS_CLK_OVR_ON_0_GTE_WOFFSET                        0x0
#define GTE_APS_CLK_OVR_ON_0_GTE_DEFAULT                        _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_GTE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define GTE_APS_CLK_OVR_ON_0_GTE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_GTE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_GTE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define GTE_APS_CLK_OVR_ON_0_GTE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define GTE_APS_CLK_OVR_ON_0_GTE_DISABLE                        _MK_ENUM_CONST(0)
#define GTE_APS_CLK_OVR_ON_0_GTE_ENABLE                 _MK_ENUM_CONST(1)


// Register GTE_APS_SLICE0_TETEN_0
#define GTE_APS_SLICE0_TETEN_0                  _MK_ADDR_CONST(0x40)
#define GTE_APS_SLICE0_TETEN_0_SECURE                   0x0
#define GTE_APS_SLICE0_TETEN_0_DUAL                     0x0
#define GTE_APS_SLICE0_TETEN_0_SCR                      TESCR_0
#define GTE_APS_SLICE0_TETEN_0_WORD_COUNT                       0x1
#define GTE_APS_SLICE0_TETEN_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETEN_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETEN_0_WRITE_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETEN_0_MAP_SHIFT                        _MK_SHIFT_CONST(0)
#define GTE_APS_SLICE0_TETEN_0_MAP_FIELD                        _MK_FIELD_CONST(0xffffffff, GTE_APS_SLICE0_TETEN_0_MAP_SHIFT)
#define GTE_APS_SLICE0_TETEN_0_MAP_RANGE                        31:0
#define GTE_APS_SLICE0_TETEN_0_MAP_WOFFSET                      0x0
#define GTE_APS_SLICE0_TETEN_0_MAP_DEFAULT                      _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_MAP_DEFAULT_MASK                 _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETEN_0_MAP_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_MAP_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_MAP_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETEN_0_MAP_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register GTE_APS_SLICE0_TETDIS_0
#define GTE_APS_SLICE0_TETDIS_0                 _MK_ADDR_CONST(0x44)
#define GTE_APS_SLICE0_TETDIS_0_SECURE                  0x0
#define GTE_APS_SLICE0_TETDIS_0_DUAL                    0x0
#define GTE_APS_SLICE0_TETDIS_0_SCR                     TEDSCR_0
#define GTE_APS_SLICE0_TETDIS_0_WORD_COUNT                      0x1
#define GTE_APS_SLICE0_TETDIS_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETDIS_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETDIS_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETDIS_0_MAP_SHIFT                       _MK_SHIFT_CONST(0)
#define GTE_APS_SLICE0_TETDIS_0_MAP_FIELD                       _MK_FIELD_CONST(0xffffffff, GTE_APS_SLICE0_TETDIS_0_MAP_SHIFT)
#define GTE_APS_SLICE0_TETDIS_0_MAP_RANGE                       31:0
#define GTE_APS_SLICE0_TETDIS_0_MAP_WOFFSET                     0x0
#define GTE_APS_SLICE0_TETDIS_0_MAP_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_MAP_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE0_TETDIS_0_MAP_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_MAP_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_MAP_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE0_TETDIS_0_MAP_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register GTE_APS_SLICE1_TETEN_0
#define GTE_APS_SLICE1_TETEN_0                  _MK_ADDR_CONST(0x60)
#define GTE_APS_SLICE1_TETEN_0_SECURE                   0x0
#define GTE_APS_SLICE1_TETEN_0_DUAL                     0x0
#define GTE_APS_SLICE1_TETEN_0_SCR                      TESCR_0
#define GTE_APS_SLICE1_TETEN_0_WORD_COUNT                       0x1
#define GTE_APS_SLICE1_TETEN_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETEN_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETEN_0_WRITE_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETEN_0_MAP_SHIFT                        _MK_SHIFT_CONST(0)
#define GTE_APS_SLICE1_TETEN_0_MAP_FIELD                        _MK_FIELD_CONST(0xffffffff, GTE_APS_SLICE1_TETEN_0_MAP_SHIFT)
#define GTE_APS_SLICE1_TETEN_0_MAP_RANGE                        31:0
#define GTE_APS_SLICE1_TETEN_0_MAP_WOFFSET                      0x0
#define GTE_APS_SLICE1_TETEN_0_MAP_DEFAULT                      _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_MAP_DEFAULT_MASK                 _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETEN_0_MAP_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_MAP_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_MAP_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETEN_0_MAP_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register GTE_APS_SLICE1_TETDIS_0
#define GTE_APS_SLICE1_TETDIS_0                 _MK_ADDR_CONST(0x64)
#define GTE_APS_SLICE1_TETDIS_0_SECURE                  0x0
#define GTE_APS_SLICE1_TETDIS_0_DUAL                    0x0
#define GTE_APS_SLICE1_TETDIS_0_SCR                     TEDSCR_0
#define GTE_APS_SLICE1_TETDIS_0_WORD_COUNT                      0x1
#define GTE_APS_SLICE1_TETDIS_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETDIS_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETDIS_0_WRITE_MASK                      _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETDIS_0_MAP_SHIFT                       _MK_SHIFT_CONST(0)
#define GTE_APS_SLICE1_TETDIS_0_MAP_FIELD                       _MK_FIELD_CONST(0xffffffff, GTE_APS_SLICE1_TETDIS_0_MAP_SHIFT)
#define GTE_APS_SLICE1_TETDIS_0_MAP_RANGE                       31:0
#define GTE_APS_SLICE1_TETDIS_0_MAP_WOFFSET                     0x0
#define GTE_APS_SLICE1_TETDIS_0_MAP_DEFAULT                     _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_MAP_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define GTE_APS_SLICE1_TETDIS_0_MAP_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_MAP_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_MAP_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define GTE_APS_SLICE1_TETDIS_0_MAP_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


//
// REGISTER LIST
//
#define LIST_ARGTE_APS_REGS(_op_) \
_op_(GTE_APS_TECTRL_0) \
_op_(GTE_APS_TETSCH_0) \
_op_(GTE_APS_TETSCL_0) \
_op_(GTE_APS_TESRC_0) \
_op_(GTE_APS_TECCV_0) \
_op_(GTE_APS_TEPCV_0) \
_op_(GTE_APS_TEENCV_0) \
_op_(GTE_APS_TECMD_0) \
_op_(GTE_APS_TESTATUS_0) \
_op_(GTE_APS_CLK_OVR_ON_0) \
_op_(GTE_APS_SLICE0_TETEN_0) \
_op_(GTE_APS_SLICE0_TETDIS_0) \
_op_(GTE_APS_SLICE1_TETEN_0) \
_op_(GTE_APS_SLICE1_TETDIS_0)


//
// ADDRESS SPACES
//

#define BASE_ADDRESS_GTE_APS    0x00000000
#define BASE_ADDRESS_GTE_APS_SLICE0     0x00000040
#define BASE_ADDRESS_GTE_APS_SLICE1     0x00000060

//
// ARGTE_APS REGISTER BANKS
//

#define GTE_APS0_FIRST_REG 0x0000 // GTE_APS_TECTRL_0
#define GTE_APS0_LAST_REG 0x0024 // GTE_APS_CLK_OVR_ON_0
#define GTE_APS_SLICE00_FIRST_REG 0x0040 // GTE_APS_SLICE0_TETEN_0
#define GTE_APS_SLICE00_LAST_REG 0x0044 // GTE_APS_SLICE0_TETDIS_0
#define GTE_APS_SLICE10_FIRST_REG 0x0060 // GTE_APS_SLICE1_TETEN_0
#define GTE_APS_SLICE10_LAST_REG 0x0064 // GTE_APS_SLICE1_TETDIS_0

// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif

#endif // ifndef ___ARGTE_APS_H_INC_
