//
// Copyright (c) 2018 NVIDIA Corporation.
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// Neither the name of the NVIDIA Corporation nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//

//
// DO NOT EDIT - generated by simspec!
//

#ifndef ___ARAMISC_H_INC_
#define ___ARAMISC_H_INC_
#define NV_MOBILE_ARAMISC_H_UNIT_OF_OFFSET 1B


// Register AMISC_AMISC_CONFIG_0
#define AMISC_AMISC_CONFIG_0                    _MK_ADDR_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_SECURE                     0x0
#define AMISC_AMISC_CONFIG_0_DUAL                       0x0
#define AMISC_AMISC_CONFIG_0_SCR                        0
#define AMISC_AMISC_CONFIG_0_WORD_COUNT                         0x1
#define AMISC_AMISC_CONFIG_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_RESET_MASK                         _MK_MASK_CONST(0x80000000)
#define AMISC_AMISC_CONFIG_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_READ_MASK                  _MK_MASK_CONST(0x80000000)
#define AMISC_AMISC_CONFIG_0_WRITE_MASK                         _MK_MASK_CONST(0x80000000)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_SHIFT                       _MK_SHIFT_CONST(31)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_FIELD                       _MK_FIELD_CONST(0x1, AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_SHIFT)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_RANGE                       31:31
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_WOFFSET                     0x0
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_AMISC_CONFIG_0_DISABLE_ERROR_RESPONSE_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_ADSP_CONFIG_0
#define AMISC_ADSP_CONFIG_0                     _MK_ADDR_CONST(0x4)
#define AMISC_ADSP_CONFIG_0_SECURE                      0x0
#define AMISC_ADSP_CONFIG_0_DUAL                        0x0
#define AMISC_ADSP_CONFIG_0_SCR                         0
#define AMISC_ADSP_CONFIG_0_WORD_COUNT                  0x1
#define AMISC_ADSP_CONFIG_0_RESET_VAL                   _MK_MASK_CONST(0xe0800000)
#define AMISC_ADSP_CONFIG_0_RESET_MASK                  _MK_MASK_CONST(0xe7bc0000)
#define AMISC_ADSP_CONFIG_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_READ_MASK                   _MK_MASK_CONST(0xe7bc0000)
#define AMISC_ADSP_CONFIG_0_WRITE_MASK                  _MK_MASK_CONST(0xe7bc0000)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_SHIFT                 _MK_SHIFT_CONST(29)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_FIELD                 _MK_FIELD_CONST(0x7, AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_SHIFT)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_RANGE                 31:29
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_WOFFSET                       0x0
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_DEFAULT                       _MK_MASK_CONST(0x7)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_DEFAULT_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_MAXCLKLATENCY_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define AMISC_ADSP_CONFIG_0_CLUSTERID_SHIFT                     _MK_SHIFT_CONST(23)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_FIELD                     _MK_FIELD_CONST(0xf, AMISC_ADSP_CONFIG_0_CLUSTERID_SHIFT)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_RANGE                     26:23
#define AMISC_ADSP_CONFIG_0_CLUSTERID_WOFFSET                   0x0
#define AMISC_ADSP_CONFIG_0_CLUSTERID_DEFAULT                   _MK_MASK_CONST(0x1)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_DEFAULT_MASK                      _MK_MASK_CONST(0xf)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CLUSTERID_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)

#define AMISC_ADSP_CONFIG_0_VINITHI_SHIFT                       _MK_SHIFT_CONST(21)
#define AMISC_ADSP_CONFIG_0_VINITHI_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ADSP_CONFIG_0_VINITHI_SHIFT)
#define AMISC_ADSP_CONFIG_0_VINITHI_RANGE                       21:21
#define AMISC_ADSP_CONFIG_0_VINITHI_WOFFSET                     0x0
#define AMISC_ADSP_CONFIG_0_VINITHI_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_VINITHI_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ADSP_CONFIG_0_VINITHI_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_VINITHI_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_VINITHI_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_VINITHI_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_SHIFT                   _MK_SHIFT_CONST(20)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_FIELD                   _MK_FIELD_CONST(0x1, AMISC_ADSP_CONFIG_0_CFGSDISABLE_SHIFT)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_RANGE                   20:20
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_WOFFSET                 0x0
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CFGSDISABLE_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)

#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_SHIFT                  _MK_SHIFT_CONST(19)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_FIELD                  _MK_FIELD_CONST(0x1, AMISC_ADSP_CONFIG_0_CP15SDISABLE_SHIFT)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_RANGE                  19:19
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_WOFFSET                        0x0
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_CP15SDISABLE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define AMISC_ADSP_CONFIG_0_EVENTI_SHIFT                        _MK_SHIFT_CONST(18)
#define AMISC_ADSP_CONFIG_0_EVENTI_FIELD                        _MK_FIELD_CONST(0x1, AMISC_ADSP_CONFIG_0_EVENTI_SHIFT)
#define AMISC_ADSP_CONFIG_0_EVENTI_RANGE                        18:18
#define AMISC_ADSP_CONFIG_0_EVENTI_WOFFSET                      0x0
#define AMISC_ADSP_CONFIG_0_EVENTI_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_EVENTI_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define AMISC_ADSP_CONFIG_0_EVENTI_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_EVENTI_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_EVENTI_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_CONFIG_0_EVENTI_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_ADSP_PERIPHBASE_0
#define AMISC_ADSP_PERIPHBASE_0                 _MK_ADDR_CONST(0x8)
#define AMISC_ADSP_PERIPHBASE_0_SECURE                  0x0
#define AMISC_ADSP_PERIPHBASE_0_DUAL                    0x0
#define AMISC_ADSP_PERIPHBASE_0_SCR                     0
#define AMISC_ADSP_PERIPHBASE_0_WORD_COUNT                      0x1
#define AMISC_ADSP_PERIPHBASE_0_RESET_VAL                       _MK_MASK_CONST(0x2000)
#define AMISC_ADSP_PERIPHBASE_0_RESET_MASK                      _MK_MASK_CONST(0xffffe000)
#define AMISC_ADSP_PERIPHBASE_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_PERIPHBASE_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_ADSP_PERIPHBASE_0_READ_MASK                       _MK_MASK_CONST(0xffffe000)
#define AMISC_ADSP_PERIPHBASE_0_WRITE_MASK                      _MK_MASK_CONST(0xffffe000)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_SHIFT                        _MK_SHIFT_CONST(13)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_FIELD                        _MK_FIELD_CONST(0x7ffff, AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_SHIFT)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_RANGE                        31:13
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_WOFFSET                      0x0
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_DEFAULT                      _MK_MASK_CONST(0x1)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_DEFAULT_MASK                 _MK_MASK_CONST(0x7ffff)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_PERIPHBASE_0_PERIPHBASE_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_ADSP_L2_CONFIG_0
#define AMISC_ADSP_L2_CONFIG_0                  _MK_ADDR_CONST(0xc)
#define AMISC_ADSP_L2_CONFIG_0_SECURE                   0x0
#define AMISC_ADSP_L2_CONFIG_0_DUAL                     0x0
#define AMISC_ADSP_L2_CONFIG_0_SCR                      0
#define AMISC_ADSP_L2_CONFIG_0_WORD_COUNT                       0x1
#define AMISC_ADSP_L2_CONFIG_0_RESET_VAL                        _MK_MASK_CONST(0x2000000)
#define AMISC_ADSP_L2_CONFIG_0_RESET_MASK                       _MK_MASK_CONST(0x7e000000)
#define AMISC_ADSP_L2_CONFIG_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_CONFIG_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_CONFIG_0_READ_MASK                        _MK_MASK_CONST(0x7e000000)
#define AMISC_ADSP_L2_CONFIG_0_WRITE_MASK                       _MK_MASK_CONST(0x7e000000)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_SHIFT                    _MK_SHIFT_CONST(25)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_FIELD                    _MK_FIELD_CONST(0x3f, AMISC_ADSP_L2_CONFIG_0_CACHEID_SHIFT)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_RANGE                    30:25
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_WOFFSET                  0x0
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_DEFAULT                  _MK_MASK_CONST(0x1)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_DEFAULT_MASK                     _MK_MASK_CONST(0x3f)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_CONFIG_0_CACHEID_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register AMISC_ADSP_L2_REGFILEBASE_0
#define AMISC_ADSP_L2_REGFILEBASE_0                     _MK_ADDR_CONST(0x10)
#define AMISC_ADSP_L2_REGFILEBASE_0_SECURE                      0x0
#define AMISC_ADSP_L2_REGFILEBASE_0_DUAL                        0x0
#define AMISC_ADSP_L2_REGFILEBASE_0_SCR                         0
#define AMISC_ADSP_L2_REGFILEBASE_0_WORD_COUNT                  0x1
#define AMISC_ADSP_L2_REGFILEBASE_0_RESET_VAL                   _MK_MASK_CONST(0x4000)
#define AMISC_ADSP_L2_REGFILEBASE_0_RESET_MASK                  _MK_MASK_CONST(0xfffff000)
#define AMISC_ADSP_L2_REGFILEBASE_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_REGFILEBASE_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_REGFILEBASE_0_READ_MASK                   _MK_MASK_CONST(0xfffff000)
#define AMISC_ADSP_L2_REGFILEBASE_0_WRITE_MASK                  _MK_MASK_CONST(0xfffff000)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_SHIFT                   _MK_SHIFT_CONST(12)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_FIELD                   _MK_FIELD_CONST(0xfffff, AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_SHIFT)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_RANGE                   31:12
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_WOFFSET                 0x0
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_DEFAULT                 _MK_MASK_CONST(0x4)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_DEFAULT_MASK                    _MK_MASK_CONST(0xfffff)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_L2_REGFILEBASE_0_REGFILEBASE_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register AMISC_ADSP_STATUS_0
#define AMISC_ADSP_STATUS_0                     _MK_ADDR_CONST(0x14)
#define AMISC_ADSP_STATUS_0_SECURE                      0x0
#define AMISC_ADSP_STATUS_0_DUAL                        0x0
#define AMISC_ADSP_STATUS_0_SCR                         0
#define AMISC_ADSP_STATUS_0_WORD_COUNT                  0x1
#define AMISC_ADSP_STATUS_0_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_RESET_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_READ_MASK                   _MK_MASK_CONST(0xe0000000)
#define AMISC_ADSP_STATUS_0_WRITE_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_IDLE_SHIFT                       _MK_SHIFT_CONST(31)
#define AMISC_ADSP_STATUS_0_L2_IDLE_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ADSP_STATUS_0_L2_IDLE_SHIFT)
#define AMISC_ADSP_STATUS_0_L2_IDLE_RANGE                       31:31
#define AMISC_ADSP_STATUS_0_L2_IDLE_WOFFSET                     0x0
#define AMISC_ADSP_STATUS_0_L2_IDLE_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_IDLE_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_IDLE_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_IDLE_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_IDLE_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_IDLE_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_SHIFT                 _MK_SHIFT_CONST(30)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_SHIFT)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_RANGE                 30:30
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_WOFFSET                       0x0
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_L2_CLKSTOPPED_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_SHIFT                   _MK_SHIFT_CONST(29)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_FIELD                   _MK_FIELD_CONST(0x1, AMISC_ADSP_STATUS_0_DBGNOPWRDWN_SHIFT)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_RANGE                   29:29
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_WOFFSET                 0x0
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define AMISC_ADSP_STATUS_0_DBGNOPWRDWN_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register AMISC_ADSP_AGIC_CONFIG_0
#define AMISC_ADSP_AGIC_CONFIG_0                        _MK_ADDR_CONST(0x18)
#define AMISC_ADSP_AGIC_CONFIG_0_SECURE                         0x0
#define AMISC_ADSP_AGIC_CONFIG_0_DUAL                   0x0
#define AMISC_ADSP_AGIC_CONFIG_0_SCR                    0
#define AMISC_ADSP_AGIC_CONFIG_0_WORD_COUNT                     0x1
#define AMISC_ADSP_AGIC_CONFIG_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_RESET_MASK                     _MK_MASK_CONST(0x9ff00000)
#define AMISC_ADSP_AGIC_CONFIG_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_READ_MASK                      _MK_MASK_CONST(0x9ff00000)
#define AMISC_ADSP_AGIC_CONFIG_0_WRITE_MASK                     _MK_MASK_CONST(0x9ff00000)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_SHIFT                      _MK_SHIFT_CONST(31)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_FIELD                      _MK_FIELD_CONST(0x1, AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_SHIFT)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_RANGE                      31:31
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_WOFFSET                    0x0
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_CFGSDISABLE_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)

#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_SHIFT                        _MK_SHIFT_CONST(24)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_FIELD                        _MK_FIELD_CONST(0x1f, AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_SHIFT)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_RANGE                        28:24
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_WOFFSET                      0x0
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_DEFAULT_MASK                 _MK_MASK_CONST(0x1f)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_NS_ENABLE_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_SHIFT                        _MK_SHIFT_CONST(20)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_FIELD                        _MK_FIELD_CONST(0xf, AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_SHIFT)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_RANGE                        23:20
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_WOFFSET                      0x0
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_DEFAULT_MASK                 _MK_MASK_CONST(0xf)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ADSP_AGIC_CONFIG_0_GICD_MASK_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_CONFIG_LOCK_0
#define AMISC_CONFIG_LOCK_0                     _MK_ADDR_CONST(0x1c)
#define AMISC_CONFIG_LOCK_0_SECURE                      0x0
#define AMISC_CONFIG_LOCK_0_DUAL                        0x0
#define AMISC_CONFIG_LOCK_0_SCR                         0
#define AMISC_CONFIG_LOCK_0_WORD_COUNT                  0x1
#define AMISC_CONFIG_LOCK_0_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_RESET_MASK                  _MK_MASK_CONST(0x80000000)
#define AMISC_CONFIG_LOCK_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_READ_MASK                   _MK_MASK_CONST(0x80000000)
#define AMISC_CONFIG_LOCK_0_WRITE_MASK                  _MK_MASK_CONST(0x80000000)
#define AMISC_CONFIG_LOCK_0_ADSP_SHIFT                  _MK_SHIFT_CONST(31)
#define AMISC_CONFIG_LOCK_0_ADSP_FIELD                  _MK_FIELD_CONST(0x1, AMISC_CONFIG_LOCK_0_ADSP_SHIFT)
#define AMISC_CONFIG_LOCK_0_ADSP_RANGE                  31:31
#define AMISC_CONFIG_LOCK_0_ADSP_WOFFSET                        0x0
#define AMISC_CONFIG_LOCK_0_ADSP_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_ADSP_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_CONFIG_LOCK_0_ADSP_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_ADSP_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_ADSP_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_CONFIG_LOCK_0_ADSP_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Reserved address 0x20

// Reserved address 0x24

// Reserved address 0x28

// Reserved address 0x2c

// Reserved address 0x30

// Reserved address 0x34

// Reserved address 0x38

// Reserved address 0x3c

// Reserved address 0x40

// Reserved address 0x44

// Reserved address 0x48

// Register AMISC_TSC_LOW_0
#define AMISC_TSC_LOW_0                 _MK_ADDR_CONST(0x4c)
#define AMISC_TSC_LOW_0_SECURE                  0x0
#define AMISC_TSC_LOW_0_DUAL                    0x0
#define AMISC_TSC_LOW_0_SCR                     0
#define AMISC_TSC_LOW_0_WORD_COUNT                      0x1
#define AMISC_TSC_LOW_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_RESET_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_TSC_LOW_0_WRITE_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_TIMESTAMP_SHIFT                 _MK_SHIFT_CONST(0)
#define AMISC_TSC_LOW_0_TIMESTAMP_FIELD                 _MK_FIELD_CONST(0xffffffff, AMISC_TSC_LOW_0_TIMESTAMP_SHIFT)
#define AMISC_TSC_LOW_0_TIMESTAMP_RANGE                 31:0
#define AMISC_TSC_LOW_0_TIMESTAMP_WOFFSET                       0x0
#define AMISC_TSC_LOW_0_TIMESTAMP_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_TIMESTAMP_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_TIMESTAMP_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_TIMESTAMP_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_TIMESTAMP_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_TSC_LOW_0_TIMESTAMP_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Register AMISC_TSC_HIGH_0
#define AMISC_TSC_HIGH_0                        _MK_ADDR_CONST(0x50)
#define AMISC_TSC_HIGH_0_SECURE                         0x0
#define AMISC_TSC_HIGH_0_DUAL                   0x0
#define AMISC_TSC_HIGH_0_SCR                    0
#define AMISC_TSC_HIGH_0_WORD_COUNT                     0x1
#define AMISC_TSC_HIGH_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_RESET_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_READ_MASK                      _MK_MASK_CONST(0xffffff)
#define AMISC_TSC_HIGH_0_WRITE_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_FIELD                        _MK_FIELD_CONST(0xffffff, AMISC_TSC_HIGH_0_TIMESTAMP_SHIFT)
#define AMISC_TSC_HIGH_0_TIMESTAMP_RANGE                        23:0
#define AMISC_TSC_HIGH_0_TIMESTAMP_WOFFSET                      0x0
#define AMISC_TSC_HIGH_0_TIMESTAMP_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_TSC_HIGH_0_TIMESTAMP_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_IDLE_0
#define AMISC_IDLE_0                    _MK_ADDR_CONST(0x54)
#define AMISC_IDLE_0_SECURE                     0x0
#define AMISC_IDLE_0_DUAL                       0x0
#define AMISC_IDLE_0_SCR                        0
#define AMISC_IDLE_0_WORD_COUNT                         0x1
#define AMISC_IDLE_0_RESET_VAL                  _MK_MASK_CONST(0x80000000)
#define AMISC_IDLE_0_RESET_MASK                         _MK_MASK_CONST(0x80000000)
#define AMISC_IDLE_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_IDLE_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_IDLE_0_READ_MASK                  _MK_MASK_CONST(0x80000000)
#define AMISC_IDLE_0_WRITE_MASK                         _MK_MASK_CONST(0x80000000)
#define AMISC_IDLE_0_IDLE_EN_SHIFT                      _MK_SHIFT_CONST(31)
#define AMISC_IDLE_0_IDLE_EN_FIELD                      _MK_FIELD_CONST(0x1, AMISC_IDLE_0_IDLE_EN_SHIFT)
#define AMISC_IDLE_0_IDLE_EN_RANGE                      31:31
#define AMISC_IDLE_0_IDLE_EN_WOFFSET                    0x0
#define AMISC_IDLE_0_IDLE_EN_DEFAULT                    _MK_MASK_CONST(0x1)
#define AMISC_IDLE_0_IDLE_EN_DEFAULT_MASK                       _MK_MASK_CONST(0x1)
#define AMISC_IDLE_0_IDLE_EN_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_IDLE_0_IDLE_EN_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_IDLE_0_IDLE_EN_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_IDLE_0_IDLE_EN_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_0
#define AMISC_ACTMON_0                  _MK_ADDR_CONST(0x58)
#define AMISC_ACTMON_0_SECURE                   0x0
#define AMISC_ACTMON_0_DUAL                     0x0
#define AMISC_ACTMON_0_SCR                      0
#define AMISC_ACTMON_0_WORD_COUNT                       0x1
#define AMISC_ACTMON_0_RESET_VAL                        _MK_MASK_CONST(0x7f800000)
#define AMISC_ACTMON_0_RESET_MASK                       _MK_MASK_CONST(0xff800000)
#define AMISC_ACTMON_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_READ_MASK                        _MK_MASK_CONST(0xff800000)
#define AMISC_ACTMON_0_WRITE_MASK                       _MK_MASK_CONST(0xff800000)
#define AMISC_ACTMON_0_CNT_ENABLE_SHIFT                 _MK_SHIFT_CONST(31)
#define AMISC_ACTMON_0_CNT_ENABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_0_CNT_ENABLE_SHIFT)
#define AMISC_ACTMON_0_CNT_ENABLE_RANGE                 31:31
#define AMISC_ACTMON_0_CNT_ENABLE_WOFFSET                       0x0
#define AMISC_ACTMON_0_CNT_ENABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_ENABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_0_CNT_ENABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_ENABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_ENABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_ENABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define AMISC_ACTMON_0_CNT_TARGET_SHIFT                 _MK_SHIFT_CONST(23)
#define AMISC_ACTMON_0_CNT_TARGET_FIELD                 _MK_FIELD_CONST(0xff, AMISC_ACTMON_0_CNT_TARGET_SHIFT)
#define AMISC_ACTMON_0_CNT_TARGET_RANGE                 30:23
#define AMISC_ACTMON_0_CNT_TARGET_WOFFSET                       0x0
#define AMISC_ACTMON_0_CNT_TARGET_DEFAULT                       _MK_MASK_CONST(0xff)
#define AMISC_ACTMON_0_CNT_TARGET_DEFAULT_MASK                  _MK_MASK_CONST(0xff)
#define AMISC_ACTMON_0_CNT_TARGET_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_TARGET_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_TARGET_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_0_CNT_TARGET_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Reserved address 0x5c

// Register AMISC_MC_STATS_READ_0
#define AMISC_MC_STATS_READ_0                   _MK_ADDR_CONST(0x60)
#define AMISC_MC_STATS_READ_0_SECURE                    0x0
#define AMISC_MC_STATS_READ_0_DUAL                      0x0
#define AMISC_MC_STATS_READ_0_SCR                       0
#define AMISC_MC_STATS_READ_0_WORD_COUNT                        0x1
#define AMISC_MC_STATS_READ_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_RESET_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_READ_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_0_WRITE_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_COUNT_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_READ_0_COUNT_FIELD                       _MK_FIELD_CONST(0xffffffff, AMISC_MC_STATS_READ_0_COUNT_SHIFT)
#define AMISC_MC_STATS_READ_0_COUNT_RANGE                       31:0
#define AMISC_MC_STATS_READ_0_COUNT_WOFFSET                     0x0
#define AMISC_MC_STATS_READ_0_COUNT_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_COUNT_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_0_COUNT_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_COUNT_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_COUNT_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_0_COUNT_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_READ
#define AMISC_MC_STATS_READ                     _MK_ADDR_CONST(0x60)
#define AMISC_MC_STATS_READ_SECURE                      0x0
#define AMISC_MC_STATS_READ_DUAL                        0x0
#define AMISC_MC_STATS_READ_SCR                         0
#define AMISC_MC_STATS_READ_WORD_COUNT                  0x1
#define AMISC_MC_STATS_READ_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_RESET_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_READ_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_WRITE_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_COUNT_SHIFT                 _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_READ_COUNT_FIELD                 _MK_FIELD_CONST(0xffffffff, AMISC_MC_STATS_READ_COUNT_SHIFT)
#define AMISC_MC_STATS_READ_COUNT_RANGE                 31:0
#define AMISC_MC_STATS_READ_COUNT_WOFFSET                       0x0
#define AMISC_MC_STATS_READ_COUNT_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_COUNT_DEFAULT_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_COUNT_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_COUNT_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_COUNT_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_COUNT_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_READ_1
#define AMISC_MC_STATS_READ_1                   _MK_ADDR_CONST(0x64)
#define AMISC_MC_STATS_READ_1_SECURE                    0x0
#define AMISC_MC_STATS_READ_1_DUAL                      0x0
#define AMISC_MC_STATS_READ_1_SCR                       0
#define AMISC_MC_STATS_READ_1_WORD_COUNT                        0x1
#define AMISC_MC_STATS_READ_1_RESET_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_RESET_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_1_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_READ_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_1_WRITE_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_COUNT_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_READ_1_COUNT_FIELD                       _MK_FIELD_CONST(0xffffffff, AMISC_MC_STATS_READ_1_COUNT_SHIFT)
#define AMISC_MC_STATS_READ_1_COUNT_RANGE                       31:0
#define AMISC_MC_STATS_READ_1_COUNT_WOFFSET                     0x0
#define AMISC_MC_STATS_READ_1_COUNT_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_COUNT_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_READ_1_COUNT_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_COUNT_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_COUNT_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_READ_1_COUNT_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_WRITE_0
#define AMISC_MC_STATS_WRITE_0                  _MK_ADDR_CONST(0x68)
#define AMISC_MC_STATS_WRITE_0_SECURE                   0x0
#define AMISC_MC_STATS_WRITE_0_DUAL                     0x0
#define AMISC_MC_STATS_WRITE_0_SCR                      0
#define AMISC_MC_STATS_WRITE_0_WORD_COUNT                       0x1
#define AMISC_MC_STATS_WRITE_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_0_WRITE_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_COUNT_SHIFT                      _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_WRITE_0_COUNT_FIELD                      _MK_FIELD_CONST(0xffffffff, AMISC_MC_STATS_WRITE_0_COUNT_SHIFT)
#define AMISC_MC_STATS_WRITE_0_COUNT_RANGE                      31:0
#define AMISC_MC_STATS_WRITE_0_COUNT_WOFFSET                    0x0
#define AMISC_MC_STATS_WRITE_0_COUNT_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_COUNT_DEFAULT_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_0_COUNT_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_COUNT_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_COUNT_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_0_COUNT_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_WRITE
#define AMISC_MC_STATS_WRITE                    _MK_ADDR_CONST(0x68)
#define AMISC_MC_STATS_WRITE_SECURE                     0x0
#define AMISC_MC_STATS_WRITE_DUAL                       0x0
#define AMISC_MC_STATS_WRITE_SCR                        0
#define AMISC_MC_STATS_WRITE_WORD_COUNT                         0x1
#define AMISC_MC_STATS_WRITE_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_WRITE_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_COUNT_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_WRITE_COUNT_FIELD                        _MK_FIELD_CONST(0xffffffff, AMISC_MC_STATS_WRITE_COUNT_SHIFT)
#define AMISC_MC_STATS_WRITE_COUNT_RANGE                        31:0
#define AMISC_MC_STATS_WRITE_COUNT_WOFFSET                      0x0
#define AMISC_MC_STATS_WRITE_COUNT_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_COUNT_DEFAULT_MASK                 _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_COUNT_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_COUNT_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_COUNT_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_COUNT_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_WRITE_1
#define AMISC_MC_STATS_WRITE_1                  _MK_ADDR_CONST(0x6c)
#define AMISC_MC_STATS_WRITE_1_SECURE                   0x0
#define AMISC_MC_STATS_WRITE_1_DUAL                     0x0
#define AMISC_MC_STATS_WRITE_1_SCR                      0
#define AMISC_MC_STATS_WRITE_1_WORD_COUNT                       0x1
#define AMISC_MC_STATS_WRITE_1_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_1_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_1_WRITE_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_COUNT_SHIFT                      _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_WRITE_1_COUNT_FIELD                      _MK_FIELD_CONST(0xffffffff, AMISC_MC_STATS_WRITE_1_COUNT_SHIFT)
#define AMISC_MC_STATS_WRITE_1_COUNT_RANGE                      31:0
#define AMISC_MC_STATS_WRITE_1_COUNT_WOFFSET                    0x0
#define AMISC_MC_STATS_WRITE_1_COUNT_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_COUNT_DEFAULT_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_MC_STATS_WRITE_1_COUNT_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_COUNT_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_COUNT_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_WRITE_1_COUNT_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_CLEAR_0
#define AMISC_MC_STATS_CLEAR_0                  _MK_ADDR_CONST(0x70)
#define AMISC_MC_STATS_CLEAR_0_SECURE                   0x0
#define AMISC_MC_STATS_CLEAR_0_DUAL                     0x0
#define AMISC_MC_STATS_CLEAR_0_SCR                      0
#define AMISC_MC_STATS_CLEAR_0_WORD_COUNT                       0x1
#define AMISC_MC_STATS_CLEAR_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_RESET_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_READ_MASK                        _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_0_WRITE_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_SHIFT                  _MK_SHIFT_CONST(1)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_FIELD                  _MK_FIELD_CONST(0x1, AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_SHIFT)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_RANGE                  1:1
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_WOFFSET                        0x0
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_WRITE_COUNT_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_SHIFT                   _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_FIELD                   _MK_FIELD_CONST(0x1, AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_SHIFT)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_RANGE                   0:0
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_WOFFSET                 0x0
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_0_CLEAR_READ_COUNT_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_CLEAR
#define AMISC_MC_STATS_CLEAR                    _MK_ADDR_CONST(0x70)
#define AMISC_MC_STATS_CLEAR_SECURE                     0x0
#define AMISC_MC_STATS_CLEAR_DUAL                       0x0
#define AMISC_MC_STATS_CLEAR_SCR                        0
#define AMISC_MC_STATS_CLEAR_WORD_COUNT                         0x1
#define AMISC_MC_STATS_CLEAR_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_RESET_MASK                         _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_READ_MASK                  _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_WRITE_MASK                         _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_SHIFT                    _MK_SHIFT_CONST(1)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_FIELD                    _MK_FIELD_CONST(0x1, AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_SHIFT)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_RANGE                    1:1
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_WOFFSET                  0x0
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_WRITE_COUNT_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_FIELD                     _MK_FIELD_CONST(0x1, AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_SHIFT)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_RANGE                     0:0
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_WOFFSET                   0x0
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_CLEAR_READ_COUNT_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register AMISC_MC_STATS_CLEAR_1
#define AMISC_MC_STATS_CLEAR_1                  _MK_ADDR_CONST(0x74)
#define AMISC_MC_STATS_CLEAR_1_SECURE                   0x0
#define AMISC_MC_STATS_CLEAR_1_DUAL                     0x0
#define AMISC_MC_STATS_CLEAR_1_SCR                      0
#define AMISC_MC_STATS_CLEAR_1_WORD_COUNT                       0x1
#define AMISC_MC_STATS_CLEAR_1_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_RESET_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_1_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_READ_MASK                        _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_1_WRITE_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_SHIFT                  _MK_SHIFT_CONST(1)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_FIELD                  _MK_FIELD_CONST(0x1, AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_SHIFT)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_RANGE                  1:1
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_WOFFSET                        0x0
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_WRITE_COUNT_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_SHIFT                   _MK_SHIFT_CONST(0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_FIELD                   _MK_FIELD_CONST(0x1, AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_SHIFT)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_RANGE                   0:0
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_WOFFSET                 0x0
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_DEFAULT_MASK                    _MK_MASK_CONST(0x1)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define AMISC_MC_STATS_CLEAR_1_CLEAR_READ_COUNT_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Reserved address 0x78

// Register AMISC_KEYSLOT_NS_0
#define AMISC_KEYSLOT_NS_0                      _MK_ADDR_CONST(0x7c)
#define AMISC_KEYSLOT_NS_0_SECURE                       0x0
#define AMISC_KEYSLOT_NS_0_DUAL                         0x0
#define AMISC_KEYSLOT_NS_0_SCR                  0
#define AMISC_KEYSLOT_NS_0_WORD_COUNT                   0x1
#define AMISC_KEYSLOT_NS_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_RESET_MASK                   _MK_MASK_CONST(0xf)
#define AMISC_KEYSLOT_NS_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_READ_MASK                    _MK_MASK_CONST(0xf)
#define AMISC_KEYSLOT_NS_0_WRITE_MASK                   _MK_MASK_CONST(0xf)
#define AMISC_KEYSLOT_NS_0_DISABLE_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_NS_0_DISABLE_FIELD                        _MK_FIELD_CONST(0xf, AMISC_KEYSLOT_NS_0_DISABLE_SHIFT)
#define AMISC_KEYSLOT_NS_0_DISABLE_RANGE                        3:0
#define AMISC_KEYSLOT_NS_0_DISABLE_WOFFSET                      0x0
#define AMISC_KEYSLOT_NS_0_DISABLE_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_DISABLE_DEFAULT_MASK                 _MK_MASK_CONST(0xf)
#define AMISC_KEYSLOT_NS_0_DISABLE_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_DISABLE_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_DISABLE_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_NS_0_DISABLE_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY0_0
#define AMISC_KEYSLOT_KEY0_0                    _MK_ADDR_CONST(0x80)
#define AMISC_KEYSLOT_KEY0_0_SECURE                     0x1
#define AMISC_KEYSLOT_KEY0_0_DUAL                       0x0
#define AMISC_KEYSLOT_KEY0_0_SCR                        0
#define AMISC_KEYSLOT_KEY0_0_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY0_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_0_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_0_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY0_0_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY0_0_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY0_0_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY0_0_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY0_0_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_0_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_0_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY0
#define AMISC_KEYSLOT_KEY0                      _MK_ADDR_CONST(0x80)
#define AMISC_KEYSLOT_KEY0_SECURE                       0x1
#define AMISC_KEYSLOT_KEY0_DUAL                         0x0
#define AMISC_KEYSLOT_KEY0_SCR                  0
#define AMISC_KEYSLOT_KEY0_WORD_COUNT                   0x1
#define AMISC_KEYSLOT_KEY0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_KEY_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY0_KEY_FIELD                    _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY0_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY0_KEY_RANGE                    31:0
#define AMISC_KEYSLOT_KEY0_KEY_WOFFSET                  0x0
#define AMISC_KEYSLOT_KEY0_KEY_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_KEY_DEFAULT_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_KEY_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_KEY_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_KEY_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_KEY_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY0_1
#define AMISC_KEYSLOT_KEY0_1                    _MK_ADDR_CONST(0x84)
#define AMISC_KEYSLOT_KEY0_1_SECURE                     0x1
#define AMISC_KEYSLOT_KEY0_1_DUAL                       0x0
#define AMISC_KEYSLOT_KEY0_1_SCR                        0
#define AMISC_KEYSLOT_KEY0_1_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY0_1_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_1_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_1_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_1_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY0_1_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY0_1_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY0_1_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY0_1_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY0_1_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_1_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_1_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY0_2
#define AMISC_KEYSLOT_KEY0_2                    _MK_ADDR_CONST(0x88)
#define AMISC_KEYSLOT_KEY0_2_SECURE                     0x1
#define AMISC_KEYSLOT_KEY0_2_DUAL                       0x0
#define AMISC_KEYSLOT_KEY0_2_SCR                        0
#define AMISC_KEYSLOT_KEY0_2_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY0_2_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_2_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_2_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_2_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY0_2_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY0_2_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY0_2_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY0_2_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY0_2_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_2_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_2_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY0_3
#define AMISC_KEYSLOT_KEY0_3                    _MK_ADDR_CONST(0x8c)
#define AMISC_KEYSLOT_KEY0_3_SECURE                     0x1
#define AMISC_KEYSLOT_KEY0_3_DUAL                       0x0
#define AMISC_KEYSLOT_KEY0_3_SCR                        0
#define AMISC_KEYSLOT_KEY0_3_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY0_3_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_3_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_3_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_3_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY0_3_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY0_3_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY0_3_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY0_3_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY0_3_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY0_3_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY0_3_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY1_0
#define AMISC_KEYSLOT_KEY1_0                    _MK_ADDR_CONST(0x90)
#define AMISC_KEYSLOT_KEY1_0_SECURE                     0x1
#define AMISC_KEYSLOT_KEY1_0_DUAL                       0x0
#define AMISC_KEYSLOT_KEY1_0_SCR                        0
#define AMISC_KEYSLOT_KEY1_0_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY1_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_0_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_0_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY1_0_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY1_0_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY1_0_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY1_0_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY1_0_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_0_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_0_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY1
#define AMISC_KEYSLOT_KEY1                      _MK_ADDR_CONST(0x90)
#define AMISC_KEYSLOT_KEY1_SECURE                       0x1
#define AMISC_KEYSLOT_KEY1_DUAL                         0x0
#define AMISC_KEYSLOT_KEY1_SCR                  0
#define AMISC_KEYSLOT_KEY1_WORD_COUNT                   0x1
#define AMISC_KEYSLOT_KEY1_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_KEY_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY1_KEY_FIELD                    _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY1_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY1_KEY_RANGE                    31:0
#define AMISC_KEYSLOT_KEY1_KEY_WOFFSET                  0x0
#define AMISC_KEYSLOT_KEY1_KEY_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_KEY_DEFAULT_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_KEY_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_KEY_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_KEY_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_KEY_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY1_1
#define AMISC_KEYSLOT_KEY1_1                    _MK_ADDR_CONST(0x94)
#define AMISC_KEYSLOT_KEY1_1_SECURE                     0x1
#define AMISC_KEYSLOT_KEY1_1_DUAL                       0x0
#define AMISC_KEYSLOT_KEY1_1_SCR                        0
#define AMISC_KEYSLOT_KEY1_1_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY1_1_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_1_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_1_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_1_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY1_1_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY1_1_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY1_1_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY1_1_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY1_1_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_1_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_1_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY1_2
#define AMISC_KEYSLOT_KEY1_2                    _MK_ADDR_CONST(0x98)
#define AMISC_KEYSLOT_KEY1_2_SECURE                     0x1
#define AMISC_KEYSLOT_KEY1_2_DUAL                       0x0
#define AMISC_KEYSLOT_KEY1_2_SCR                        0
#define AMISC_KEYSLOT_KEY1_2_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY1_2_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_2_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_2_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_2_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY1_2_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY1_2_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY1_2_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY1_2_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY1_2_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_2_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_2_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY1_3
#define AMISC_KEYSLOT_KEY1_3                    _MK_ADDR_CONST(0x9c)
#define AMISC_KEYSLOT_KEY1_3_SECURE                     0x1
#define AMISC_KEYSLOT_KEY1_3_DUAL                       0x0
#define AMISC_KEYSLOT_KEY1_3_SCR                        0
#define AMISC_KEYSLOT_KEY1_3_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY1_3_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_3_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_3_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_3_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY1_3_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY1_3_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY1_3_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY1_3_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY1_3_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY1_3_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY1_3_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY2_0
#define AMISC_KEYSLOT_KEY2_0                    _MK_ADDR_CONST(0xa0)
#define AMISC_KEYSLOT_KEY2_0_SECURE                     0x1
#define AMISC_KEYSLOT_KEY2_0_DUAL                       0x0
#define AMISC_KEYSLOT_KEY2_0_SCR                        0
#define AMISC_KEYSLOT_KEY2_0_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY2_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_0_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_0_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY2_0_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY2_0_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY2_0_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY2_0_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY2_0_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_0_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_0_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY2
#define AMISC_KEYSLOT_KEY2                      _MK_ADDR_CONST(0xa0)
#define AMISC_KEYSLOT_KEY2_SECURE                       0x1
#define AMISC_KEYSLOT_KEY2_DUAL                         0x0
#define AMISC_KEYSLOT_KEY2_SCR                  0
#define AMISC_KEYSLOT_KEY2_WORD_COUNT                   0x1
#define AMISC_KEYSLOT_KEY2_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_KEY_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY2_KEY_FIELD                    _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY2_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY2_KEY_RANGE                    31:0
#define AMISC_KEYSLOT_KEY2_KEY_WOFFSET                  0x0
#define AMISC_KEYSLOT_KEY2_KEY_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_KEY_DEFAULT_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_KEY_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_KEY_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_KEY_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_KEY_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY2_1
#define AMISC_KEYSLOT_KEY2_1                    _MK_ADDR_CONST(0xa4)
#define AMISC_KEYSLOT_KEY2_1_SECURE                     0x1
#define AMISC_KEYSLOT_KEY2_1_DUAL                       0x0
#define AMISC_KEYSLOT_KEY2_1_SCR                        0
#define AMISC_KEYSLOT_KEY2_1_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY2_1_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_1_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_1_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_1_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY2_1_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY2_1_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY2_1_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY2_1_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY2_1_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_1_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_1_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY2_2
#define AMISC_KEYSLOT_KEY2_2                    _MK_ADDR_CONST(0xa8)
#define AMISC_KEYSLOT_KEY2_2_SECURE                     0x1
#define AMISC_KEYSLOT_KEY2_2_DUAL                       0x0
#define AMISC_KEYSLOT_KEY2_2_SCR                        0
#define AMISC_KEYSLOT_KEY2_2_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY2_2_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_2_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_2_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_2_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY2_2_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY2_2_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY2_2_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY2_2_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY2_2_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_2_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_2_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY2_3
#define AMISC_KEYSLOT_KEY2_3                    _MK_ADDR_CONST(0xac)
#define AMISC_KEYSLOT_KEY2_3_SECURE                     0x1
#define AMISC_KEYSLOT_KEY2_3_DUAL                       0x0
#define AMISC_KEYSLOT_KEY2_3_SCR                        0
#define AMISC_KEYSLOT_KEY2_3_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY2_3_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_3_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_3_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_3_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY2_3_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY2_3_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY2_3_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY2_3_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY2_3_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY2_3_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY2_3_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY3_0
#define AMISC_KEYSLOT_KEY3_0                    _MK_ADDR_CONST(0xb0)
#define AMISC_KEYSLOT_KEY3_0_SECURE                     0x1
#define AMISC_KEYSLOT_KEY3_0_DUAL                       0x0
#define AMISC_KEYSLOT_KEY3_0_SCR                        0
#define AMISC_KEYSLOT_KEY3_0_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY3_0_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_0_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_0_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_0_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY3_0_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY3_0_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY3_0_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY3_0_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY3_0_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_0_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_0_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY3
#define AMISC_KEYSLOT_KEY3                      _MK_ADDR_CONST(0xb0)
#define AMISC_KEYSLOT_KEY3_SECURE                       0x1
#define AMISC_KEYSLOT_KEY3_DUAL                         0x0
#define AMISC_KEYSLOT_KEY3_SCR                  0
#define AMISC_KEYSLOT_KEY3_WORD_COUNT                   0x1
#define AMISC_KEYSLOT_KEY3_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_RESET_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_READ_MASK                    _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_WRITE_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_KEY_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY3_KEY_FIELD                    _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY3_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY3_KEY_RANGE                    31:0
#define AMISC_KEYSLOT_KEY3_KEY_WOFFSET                  0x0
#define AMISC_KEYSLOT_KEY3_KEY_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_KEY_DEFAULT_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_KEY_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_KEY_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_KEY_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_KEY_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY3_1
#define AMISC_KEYSLOT_KEY3_1                    _MK_ADDR_CONST(0xb4)
#define AMISC_KEYSLOT_KEY3_1_SECURE                     0x1
#define AMISC_KEYSLOT_KEY3_1_DUAL                       0x0
#define AMISC_KEYSLOT_KEY3_1_SCR                        0
#define AMISC_KEYSLOT_KEY3_1_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY3_1_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_1_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_1_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_1_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY3_1_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY3_1_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY3_1_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY3_1_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY3_1_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_1_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_1_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY3_2
#define AMISC_KEYSLOT_KEY3_2                    _MK_ADDR_CONST(0xb8)
#define AMISC_KEYSLOT_KEY3_2_SECURE                     0x1
#define AMISC_KEYSLOT_KEY3_2_DUAL                       0x0
#define AMISC_KEYSLOT_KEY3_2_SCR                        0
#define AMISC_KEYSLOT_KEY3_2_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY3_2_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_2_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_2_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_2_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY3_2_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY3_2_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY3_2_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY3_2_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY3_2_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_2_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_2_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_KEYSLOT_KEY3_3
#define AMISC_KEYSLOT_KEY3_3                    _MK_ADDR_CONST(0xbc)
#define AMISC_KEYSLOT_KEY3_3_SECURE                     0x1
#define AMISC_KEYSLOT_KEY3_3_DUAL                       0x0
#define AMISC_KEYSLOT_KEY3_3_SCR                        0
#define AMISC_KEYSLOT_KEY3_3_WORD_COUNT                         0x1
#define AMISC_KEYSLOT_KEY3_3_RESET_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_RESET_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_3_SW_DEFAULT_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_READ_MASK                  _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_3_WRITE_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_3_KEY_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_KEYSLOT_KEY3_3_KEY_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_KEYSLOT_KEY3_3_KEY_SHIFT)
#define AMISC_KEYSLOT_KEY3_3_KEY_RANGE                  31:0
#define AMISC_KEYSLOT_KEY3_3_KEY_WOFFSET                        0x0
#define AMISC_KEYSLOT_KEY3_3_KEY_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_KEY_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_KEYSLOT_KEY3_3_KEY_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_KEY_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_KEY_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_KEYSLOT_KEY3_3_KEY_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_APE_TSC_CTRL_0_0
#define AMISC_APE_TSC_CTRL_0_0                  _MK_ADDR_CONST(0xc0)
#define AMISC_APE_TSC_CTRL_0_0_SECURE                   0x0
#define AMISC_APE_TSC_CTRL_0_0_DUAL                     0x0
#define AMISC_APE_TSC_CTRL_0_0_SCR                      0
#define AMISC_APE_TSC_CTRL_0_0_WORD_COUNT                       0x1
#define AMISC_APE_TSC_CTRL_0_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_0_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_0_0_WRITE_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_FIELD                    _MK_FIELD_CONST(0xffff, AMISC_APE_TSC_CTRL_0_0_N_FRACT_SHIFT)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_RANGE                    15:0
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_WOFFSET                  0x0
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_DEFAULT_MASK                     _MK_MASK_CONST(0xffff)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_FRACT_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_SHIFT                   _MK_SHIFT_CONST(16)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_FIELD                   _MK_FIELD_CONST(0xffff, AMISC_APE_TSC_CTRL_0_0_N_MODULO_SHIFT)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_RANGE                   31:16
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_WOFFSET                 0x0
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_DEFAULT_MASK                    _MK_MASK_CONST(0xffff)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_SW_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_SW_DEFAULT_MASK                 _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_PARITY_PROTECTION                       _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_0_0_N_MODULO_PLATFORM_DEPENDENT                      _MK_MASK_CONST(0x1)


// Register AMISC_APE_TSC_CTRL_1_0
#define AMISC_APE_TSC_CTRL_1_0                  _MK_ADDR_CONST(0xc4)
#define AMISC_APE_TSC_CTRL_1_0_SECURE                   0x0
#define AMISC_APE_TSC_CTRL_1_0_DUAL                     0x0
#define AMISC_APE_TSC_CTRL_1_0_SCR                      0
#define AMISC_APE_TSC_CTRL_1_0_WORD_COUNT                       0x1
#define AMISC_APE_TSC_CTRL_1_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_RESET_MASK                       _MK_MASK_CONST(0xffff)
#define AMISC_APE_TSC_CTRL_1_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_READ_MASK                        _MK_MASK_CONST(0xffff)
#define AMISC_APE_TSC_CTRL_1_0_WRITE_MASK                       _MK_MASK_CONST(0xffff)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_SHIFT                      _MK_SHIFT_CONST(0)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_FIELD                      _MK_FIELD_CONST(0xffff, AMISC_APE_TSC_CTRL_1_0_N_INT_SHIFT)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_RANGE                      15:0
#define AMISC_APE_TSC_CTRL_1_0_N_INT_WOFFSET                    0x0
#define AMISC_APE_TSC_CTRL_1_0_N_INT_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_DEFAULT_MASK                       _MK_MASK_CONST(0xffff)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_1_0_N_INT_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register AMISC_APE_TSC_CTRL_2_0
#define AMISC_APE_TSC_CTRL_2_0                  _MK_ADDR_CONST(0xc8)
#define AMISC_APE_TSC_CTRL_2_0_SECURE                   0x0
#define AMISC_APE_TSC_CTRL_2_0_DUAL                     0x0
#define AMISC_APE_TSC_CTRL_2_0_SCR                      0
#define AMISC_APE_TSC_CTRL_2_0_WORD_COUNT                       0x1
#define AMISC_APE_TSC_CTRL_2_0_RESET_VAL                        _MK_MASK_CONST(0x3b9aca00)
#define AMISC_APE_TSC_CTRL_2_0_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_2_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_2_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_2_0_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_2_0_WRITE_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_SHIFT                      _MK_SHIFT_CONST(0)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_FIELD                      _MK_FIELD_CONST(0xffffffff, AMISC_APE_TSC_CTRL_2_0_N_SEC_SHIFT)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_RANGE                      31:0
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_WOFFSET                    0x0
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_DEFAULT                    _MK_MASK_CONST(0x3b9aca00)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_DEFAULT_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_2_0_N_SEC_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register AMISC_APE_TSC_CTRL_3_0
#define AMISC_APE_TSC_CTRL_3_0                  _MK_ADDR_CONST(0xcc)
#define AMISC_APE_TSC_CTRL_3_0_SECURE                   0x0
#define AMISC_APE_TSC_CTRL_3_0_DUAL                     0x0
#define AMISC_APE_TSC_CTRL_3_0_SCR                      0
#define AMISC_APE_TSC_CTRL_3_0_WORD_COUNT                       0x1
#define AMISC_APE_TSC_CTRL_3_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_RESET_MASK                       _MK_MASK_CONST(0x80000007)
#define AMISC_APE_TSC_CTRL_3_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_READ_MASK                        _MK_MASK_CONST(0x80000007)
#define AMISC_APE_TSC_CTRL_3_0_WRITE_MASK                       _MK_MASK_CONST(0x80000007)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_FIELD                    _MK_FIELD_CONST(0x1, AMISC_APE_TSC_CTRL_3_0_TRIGGER_SHIFT)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_RANGE                    0:0
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_WOFFSET                  0x0
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_TRIGGER_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)

#define AMISC_APE_TSC_CTRL_3_0_RST_SHIFT                        _MK_SHIFT_CONST(1)
#define AMISC_APE_TSC_CTRL_3_0_RST_FIELD                        _MK_FIELD_CONST(0x1, AMISC_APE_TSC_CTRL_3_0_RST_SHIFT)
#define AMISC_APE_TSC_CTRL_3_0_RST_RANGE                        1:1
#define AMISC_APE_TSC_CTRL_3_0_RST_WOFFSET                      0x0
#define AMISC_APE_TSC_CTRL_3_0_RST_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_RST_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define AMISC_APE_TSC_CTRL_3_0_RST_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_RST_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_RST_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_RST_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)

#define AMISC_APE_TSC_CTRL_3_0_COPY_SHIFT                       _MK_SHIFT_CONST(2)
#define AMISC_APE_TSC_CTRL_3_0_COPY_FIELD                       _MK_FIELD_CONST(0x1, AMISC_APE_TSC_CTRL_3_0_COPY_SHIFT)
#define AMISC_APE_TSC_CTRL_3_0_COPY_RANGE                       2:2
#define AMISC_APE_TSC_CTRL_3_0_COPY_WOFFSET                     0x0
#define AMISC_APE_TSC_CTRL_3_0_COPY_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_COPY_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_APE_TSC_CTRL_3_0_COPY_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_COPY_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_COPY_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_COPY_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)

#define AMISC_APE_TSC_CTRL_3_0_ENABLE_SHIFT                     _MK_SHIFT_CONST(31)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_FIELD                     _MK_FIELD_CONST(0x1, AMISC_APE_TSC_CTRL_3_0_ENABLE_SHIFT)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_RANGE                     31:31
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_WOFFSET                   0x0
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_DEFAULT_MASK                      _MK_MASK_CONST(0x1)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_APE_TSC_CTRL_3_0_ENABLE_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register AMISC_APE_RT_TSC_NS_0
#define AMISC_APE_RT_TSC_NS_0                   _MK_ADDR_CONST(0xd0)
#define AMISC_APE_RT_TSC_NS_0_SECURE                    0x0
#define AMISC_APE_RT_TSC_NS_0_DUAL                      0x0
#define AMISC_APE_RT_TSC_NS_0_SCR                       0
#define AMISC_APE_RT_TSC_NS_0_WORD_COUNT                        0x1
#define AMISC_APE_RT_TSC_NS_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_RESET_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_RT_TSC_NS_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_READ_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_RT_TSC_NS_0_WRITE_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_NS_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_APE_RT_TSC_NS_0_NS_FIELD                  _MK_FIELD_CONST(0xffffffff, AMISC_APE_RT_TSC_NS_0_NS_SHIFT)
#define AMISC_APE_RT_TSC_NS_0_NS_RANGE                  31:0
#define AMISC_APE_RT_TSC_NS_0_NS_WOFFSET                        0x0
#define AMISC_APE_RT_TSC_NS_0_NS_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_NS_DEFAULT_MASK                   _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_RT_TSC_NS_0_NS_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_NS_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_NS_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_NS_0_NS_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Register AMISC_APE_RT_TSC_SEC_0
#define AMISC_APE_RT_TSC_SEC_0                  _MK_ADDR_CONST(0xd4)
#define AMISC_APE_RT_TSC_SEC_0_SECURE                   0x0
#define AMISC_APE_RT_TSC_SEC_0_DUAL                     0x0
#define AMISC_APE_RT_TSC_SEC_0_SCR                      0
#define AMISC_APE_RT_TSC_SEC_0_WORD_COUNT                       0x1
#define AMISC_APE_RT_TSC_SEC_0_RESET_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_RESET_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_RT_TSC_SEC_0_SW_DEFAULT_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_READ_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_RT_TSC_SEC_0_WRITE_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_SEC_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_APE_RT_TSC_SEC_0_SEC_FIELD                        _MK_FIELD_CONST(0xffffffff, AMISC_APE_RT_TSC_SEC_0_SEC_SHIFT)
#define AMISC_APE_RT_TSC_SEC_0_SEC_RANGE                        31:0
#define AMISC_APE_RT_TSC_SEC_0_SEC_WOFFSET                      0x0
#define AMISC_APE_RT_TSC_SEC_0_SEC_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_SEC_DEFAULT_MASK                 _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_RT_TSC_SEC_0_SEC_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_SEC_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_SEC_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_APE_RT_TSC_SEC_0_SEC_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_APE_SNAP_TSC_NS_0
#define AMISC_APE_SNAP_TSC_NS_0                 _MK_ADDR_CONST(0xd8)
#define AMISC_APE_SNAP_TSC_NS_0_SECURE                  0x0
#define AMISC_APE_SNAP_TSC_NS_0_DUAL                    0x0
#define AMISC_APE_SNAP_TSC_NS_0_SCR                     0
#define AMISC_APE_SNAP_TSC_NS_0_WORD_COUNT                      0x1
#define AMISC_APE_SNAP_TSC_NS_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_RESET_MASK                      _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_SNAP_TSC_NS_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_READ_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_SNAP_TSC_NS_0_WRITE_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_NS_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_APE_SNAP_TSC_NS_0_NS_FIELD                        _MK_FIELD_CONST(0xffffffff, AMISC_APE_SNAP_TSC_NS_0_NS_SHIFT)
#define AMISC_APE_SNAP_TSC_NS_0_NS_RANGE                        31:0
#define AMISC_APE_SNAP_TSC_NS_0_NS_WOFFSET                      0x0
#define AMISC_APE_SNAP_TSC_NS_0_NS_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_NS_DEFAULT_MASK                 _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_SNAP_TSC_NS_0_NS_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_NS_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_NS_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_NS_0_NS_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_APE_SNAP_TSC_SEC_0
#define AMISC_APE_SNAP_TSC_SEC_0                        _MK_ADDR_CONST(0xdc)
#define AMISC_APE_SNAP_TSC_SEC_0_SECURE                         0x0
#define AMISC_APE_SNAP_TSC_SEC_0_DUAL                   0x0
#define AMISC_APE_SNAP_TSC_SEC_0_SCR                    0
#define AMISC_APE_SNAP_TSC_SEC_0_WORD_COUNT                     0x1
#define AMISC_APE_SNAP_TSC_SEC_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_RESET_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_SNAP_TSC_SEC_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_READ_MASK                      _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_SNAP_TSC_SEC_0_WRITE_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_SHIFT                      _MK_SHIFT_CONST(0)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_FIELD                      _MK_FIELD_CONST(0xffffffff, AMISC_APE_SNAP_TSC_SEC_0_SEC_SHIFT)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_RANGE                      31:0
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_WOFFSET                    0x0
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_DEFAULT_MASK                       _MK_MASK_CONST(0xffffffff)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_APE_SNAP_TSC_SEC_0_SEC_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)


// Register AMISC_EAVB_SNAP_TSC_NS_0
#define AMISC_EAVB_SNAP_TSC_NS_0                        _MK_ADDR_CONST(0xe0)
#define AMISC_EAVB_SNAP_TSC_NS_0_SECURE                         0x0
#define AMISC_EAVB_SNAP_TSC_NS_0_DUAL                   0x0
#define AMISC_EAVB_SNAP_TSC_NS_0_SCR                    0
#define AMISC_EAVB_SNAP_TSC_NS_0_WORD_COUNT                     0x1
#define AMISC_EAVB_SNAP_TSC_NS_0_RESET_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_RESET_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_EAVB_SNAP_TSC_NS_0_SW_DEFAULT_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_READ_MASK                      _MK_MASK_CONST(0xffffffff)
#define AMISC_EAVB_SNAP_TSC_NS_0_WRITE_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_FIELD                       _MK_FIELD_CONST(0xffffffff, AMISC_EAVB_SNAP_TSC_NS_0_NS_SHIFT)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_RANGE                       31:0
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_WOFFSET                     0x0
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_NS_0_NS_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_EAVB_SNAP_TSC_SEC_0
#define AMISC_EAVB_SNAP_TSC_SEC_0                       _MK_ADDR_CONST(0xe4)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SECURE                        0x0
#define AMISC_EAVB_SNAP_TSC_SEC_0_DUAL                  0x0
#define AMISC_EAVB_SNAP_TSC_SEC_0_SCR                   0
#define AMISC_EAVB_SNAP_TSC_SEC_0_WORD_COUNT                    0x1
#define AMISC_EAVB_SNAP_TSC_SEC_0_RESET_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_RESET_MASK                    _MK_MASK_CONST(0xffffffff)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_READ_MASK                     _MK_MASK_CONST(0xffffffff)
#define AMISC_EAVB_SNAP_TSC_SEC_0_WRITE_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_FIELD                     _MK_FIELD_CONST(0xffffffff, AMISC_EAVB_SNAP_TSC_SEC_0_SEC_SHIFT)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_RANGE                     31:0
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_WOFFSET                   0x0
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_DEFAULT_MASK                      _MK_MASK_CONST(0xffffffff)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_EAVB_SNAP_TSC_SEC_0_SEC_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register AMISC_SPARE_0
#define AMISC_SPARE_0                   _MK_ADDR_CONST(0xe8)
#define AMISC_SPARE_0_SECURE                    0x0
#define AMISC_SPARE_0_DUAL                      0x0
#define AMISC_SPARE_0_SCR                       0
#define AMISC_SPARE_0_WORD_COUNT                        0x1
#define AMISC_SPARE_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_RESET_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_SPARE_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_READ_MASK                         _MK_MASK_CONST(0xffffffff)
#define AMISC_SPARE_0_WRITE_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_SPARE_0_SPARE_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_SPARE_0_SPARE_FIELD                       _MK_FIELD_CONST(0xffffffff, AMISC_SPARE_0_SPARE_SHIFT)
#define AMISC_SPARE_0_SPARE_RANGE                       31:0
#define AMISC_SPARE_0_SPARE_WOFFSET                     0x0
#define AMISC_SPARE_0_SPARE_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_SPARE_DEFAULT_MASK                        _MK_MASK_CONST(0xffffffff)
#define AMISC_SPARE_0_SPARE_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_SPARE_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_SPARE_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_SPARE_0_SPARE_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_ACONNECT_CLOCK_GATING_DISABLE_0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0                   _MK_ADDR_CONST(0xec)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_SECURE                    0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_DUAL                      0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_SCR                       0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_WORD_COUNT                        0x1
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_RESET_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_RESET_MASK                        _MK_MASK_CONST(0xf8000000)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_READ_MASK                         _MK_MASK_CONST(0xf8000000)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_WRITE_MASK                        _MK_MASK_CONST(0xf8000000)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_SHIFT                  _MK_SHIFT_CONST(31)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_FIELD                  _MK_FIELD_CONST(0x1, AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_SHIFT)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_RANGE                  31:31
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_WOFFSET                        0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APE_GATING_DISABLE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)

#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_SHIFT                 _MK_SHIFT_CONST(30)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_SHIFT)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_RANGE                 30:30
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_WOFFSET                       0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADMA_GATING_DISABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_SHIFT                 _MK_SHIFT_CONST(29)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_SHIFT)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_RANGE                 29:29
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_WOFFSET                       0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_ADSP_GATING_DISABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_SHIFT                 _MK_SHIFT_CONST(28)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_SHIFT)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_RANGE                 28:28
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_WOFFSET                       0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_AHUB_GATING_DISABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)

#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_SHIFT                 _MK_SHIFT_CONST(27)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_SHIFT)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_RANGE                 27:27
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_WOFFSET                       0x0
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACONNECT_CLOCK_GATING_DISABLE_0_APBP_GATING_DISABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Register AMISC_APE_SLCG_OVERRIDE_0
#define AMISC_APE_SLCG_OVERRIDE_0                       _MK_ADDR_CONST(0xf0)
#define AMISC_APE_SLCG_OVERRIDE_0_SECURE                        0x0
#define AMISC_APE_SLCG_OVERRIDE_0_DUAL                  0x0
#define AMISC_APE_SLCG_OVERRIDE_0_SCR                   0
#define AMISC_APE_SLCG_OVERRIDE_0_WORD_COUNT                    0x1
#define AMISC_APE_SLCG_OVERRIDE_0_RESET_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_RESET_MASK                    _MK_MASK_CONST(0x1)
#define AMISC_APE_SLCG_OVERRIDE_0_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_READ_MASK                     _MK_MASK_CONST(0x1)
#define AMISC_APE_SLCG_OVERRIDE_0_WRITE_MASK                    _MK_MASK_CONST(0x1)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_SHIFT                  _MK_SHIFT_CONST(0)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_FIELD                  _MK_FIELD_CONST(0x1, AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_SHIFT)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_RANGE                  0:0
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_WOFFSET                        0x0
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_APE_SLCG_OVERRIDE_0_ape_clk_ovr_on_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)


// Reserved address 0xf4

// Reserved address 0xf8

// Reserved address 0xfc

// Register AMISC_ACTMON_INPUT_CONFIG_0
#define AMISC_ACTMON_INPUT_CONFIG_0                     _MK_ADDR_CONST(0x100)
#define AMISC_ACTMON_INPUT_CONFIG_0_SECURE                      0x0
#define AMISC_ACTMON_INPUT_CONFIG_0_DUAL                        0x0
#define AMISC_ACTMON_INPUT_CONFIG_0_SCR                         0
#define AMISC_ACTMON_INPUT_CONFIG_0_WORD_COUNT                  0x1
#define AMISC_ACTMON_INPUT_CONFIG_0_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_RESET_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_READ_MASK                   _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_0_WRITE_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_FIELD                     _MK_FIELD_CONST(0x7, AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_SHIFT)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_RANGE                     2:0
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_WOFFSET                   0x0
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_DEFAULT_MASK                      _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_ADSP_ACTIVE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_ADSP_MEM_STALL                    _MK_ENUM_CONST(1)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_AST_ACTIVE                        _MK_ENUM_CONST(2)
#define AMISC_ACTMON_INPUT_CONFIG_0_INPUT_SEL_OUTSTANDING_REQ_THRESHOLD                 _MK_ENUM_CONST(5)


// Register AMISC_ACTMON_INPUT_CONFIG
#define AMISC_ACTMON_INPUT_CONFIG                       _MK_ADDR_CONST(0x100)
#define AMISC_ACTMON_INPUT_CONFIG_SECURE                        0x0
#define AMISC_ACTMON_INPUT_CONFIG_DUAL                  0x0
#define AMISC_ACTMON_INPUT_CONFIG_SCR                   0
#define AMISC_ACTMON_INPUT_CONFIG_WORD_COUNT                    0x1
#define AMISC_ACTMON_INPUT_CONFIG_RESET_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_RESET_MASK                    _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_READ_MASK                     _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_WRITE_MASK                    _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_FIELD                       _MK_FIELD_CONST(0x7, AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_SHIFT)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_RANGE                       2:0
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_WOFFSET                     0x0
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_DEFAULT_MASK                        _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_ADSP_ACTIVE                 _MK_ENUM_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_ADSP_MEM_STALL                      _MK_ENUM_CONST(1)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_AST_ACTIVE                  _MK_ENUM_CONST(2)
#define AMISC_ACTMON_INPUT_CONFIG_INPUT_SEL_OUTSTANDING_REQ_THRESHOLD                   _MK_ENUM_CONST(5)


// Register AMISC_ACTMON_INPUT_CONFIG_1
#define AMISC_ACTMON_INPUT_CONFIG_1                     _MK_ADDR_CONST(0x104)
#define AMISC_ACTMON_INPUT_CONFIG_1_SECURE                      0x0
#define AMISC_ACTMON_INPUT_CONFIG_1_DUAL                        0x0
#define AMISC_ACTMON_INPUT_CONFIG_1_SCR                         0
#define AMISC_ACTMON_INPUT_CONFIG_1_WORD_COUNT                  0x1
#define AMISC_ACTMON_INPUT_CONFIG_1_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_RESET_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_1_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_READ_MASK                   _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_1_WRITE_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_FIELD                     _MK_FIELD_CONST(0x7, AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_SHIFT)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_RANGE                     2:0
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_WOFFSET                   0x0
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_DEFAULT_MASK                      _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_ADSP_ACTIVE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_ADSP_MEM_STALL                    _MK_ENUM_CONST(1)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_AST_ACTIVE                        _MK_ENUM_CONST(2)
#define AMISC_ACTMON_INPUT_CONFIG_1_INPUT_SEL_OUTSTANDING_REQ_THRESHOLD                 _MK_ENUM_CONST(5)


// Register AMISC_ACTMON_INPUT_CONFIG_2
#define AMISC_ACTMON_INPUT_CONFIG_2                     _MK_ADDR_CONST(0x108)
#define AMISC_ACTMON_INPUT_CONFIG_2_SECURE                      0x0
#define AMISC_ACTMON_INPUT_CONFIG_2_DUAL                        0x0
#define AMISC_ACTMON_INPUT_CONFIG_2_SCR                         0
#define AMISC_ACTMON_INPUT_CONFIG_2_WORD_COUNT                  0x1
#define AMISC_ACTMON_INPUT_CONFIG_2_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_RESET_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_2_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_READ_MASK                   _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_2_WRITE_MASK                  _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_FIELD                     _MK_FIELD_CONST(0x7, AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_SHIFT)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_RANGE                     2:0
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_WOFFSET                   0x0
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_DEFAULT_MASK                      _MK_MASK_CONST(0x7)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_ADSP_ACTIVE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_ADSP_MEM_STALL                    _MK_ENUM_CONST(1)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_AST_ACTIVE                        _MK_ENUM_CONST(2)
#define AMISC_ACTMON_INPUT_CONFIG_2_INPUT_SEL_OUTSTANDING_REQ_THRESHOLD                 _MK_ENUM_CONST(5)


// Register AMISC_ACTMON_MEM_ACTIVITY_0
#define AMISC_ACTMON_MEM_ACTIVITY_0                     _MK_ADDR_CONST(0x10c)
#define AMISC_ACTMON_MEM_ACTIVITY_0_SECURE                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_DUAL                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_SCR                         0
#define AMISC_ACTMON_MEM_ACTIVITY_0_WORD_COUNT                  0x1
#define AMISC_ACTMON_MEM_ACTIVITY_0_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_RESET_MASK                  _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_READ_MASK                   _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_0_WRITE_MASK                  _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_SHIFT                  _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_FIELD                  _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_RANGE                  8:8
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_WOFFSET                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_REQUEST_COUNT                  _MK_ENUM_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_MEM_ACT_MODE_TRANSFER_COUNT                 _MK_ENUM_CONST(0)

#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_SHIFT                       _MK_SHIFT_CONST(3)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_RANGE                       3:3
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_WR_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_SHIFT                       _MK_SHIFT_CONST(2)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_RANGE                       2:2
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ADAST_RD_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_SHIFT                       _MK_SHIFT_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_RANGE                       1:1
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_WR_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_RANGE                       0:0
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_0_ACAST_RD_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)


// Register AMISC_ACTMON_MEM_ACTIVITY
#define AMISC_ACTMON_MEM_ACTIVITY                       _MK_ADDR_CONST(0x10c)
#define AMISC_ACTMON_MEM_ACTIVITY_SECURE                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_DUAL                  0x0
#define AMISC_ACTMON_MEM_ACTIVITY_SCR                   0
#define AMISC_ACTMON_MEM_ACTIVITY_WORD_COUNT                    0x1
#define AMISC_ACTMON_MEM_ACTIVITY_RESET_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_RESET_MASK                    _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_READ_MASK                     _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_WRITE_MASK                    _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_SHIFT                    _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_FIELD                    _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_RANGE                    8:8
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_WOFFSET                  0x0
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_DEFAULT_MASK                     _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_REQUEST_COUNT                    _MK_ENUM_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_MEM_ACT_MODE_TRANSFER_COUNT                   _MK_ENUM_CONST(0)

#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_SHIFT                 _MK_SHIFT_CONST(3)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_RANGE                 3:3
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_WOFFSET                       0x0
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_WR_ACT_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_SHIFT                 _MK_SHIFT_CONST(2)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_RANGE                 2:2
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_WOFFSET                       0x0
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_ADAST_RD_ACT_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_SHIFT                 _MK_SHIFT_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_RANGE                 1:1
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_WOFFSET                       0x0
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_WR_ACT_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_SHIFT                 _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_RANGE                 0:0
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_WOFFSET                       0x0
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_ACAST_RD_ACT_EN_ENABLE                        _MK_ENUM_CONST(1)


// Register AMISC_ACTMON_MEM_ACTIVITY_1
#define AMISC_ACTMON_MEM_ACTIVITY_1                     _MK_ADDR_CONST(0x110)
#define AMISC_ACTMON_MEM_ACTIVITY_1_SECURE                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_DUAL                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_SCR                         0
#define AMISC_ACTMON_MEM_ACTIVITY_1_WORD_COUNT                  0x1
#define AMISC_ACTMON_MEM_ACTIVITY_1_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_RESET_MASK                  _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_1_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_READ_MASK                   _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_1_WRITE_MASK                  _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_SHIFT                  _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_FIELD                  _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_RANGE                  8:8
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_WOFFSET                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_REQUEST_COUNT                  _MK_ENUM_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_MEM_ACT_MODE_TRANSFER_COUNT                 _MK_ENUM_CONST(0)

#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_SHIFT                       _MK_SHIFT_CONST(3)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_RANGE                       3:3
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_WR_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_SHIFT                       _MK_SHIFT_CONST(2)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_RANGE                       2:2
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ADAST_RD_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_SHIFT                       _MK_SHIFT_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_RANGE                       1:1
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_WR_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_RANGE                       0:0
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_1_ACAST_RD_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)


// Register AMISC_ACTMON_MEM_ACTIVITY_2
#define AMISC_ACTMON_MEM_ACTIVITY_2                     _MK_ADDR_CONST(0x114)
#define AMISC_ACTMON_MEM_ACTIVITY_2_SECURE                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_DUAL                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_SCR                         0
#define AMISC_ACTMON_MEM_ACTIVITY_2_WORD_COUNT                  0x1
#define AMISC_ACTMON_MEM_ACTIVITY_2_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_RESET_MASK                  _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_2_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_READ_MASK                   _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_2_WRITE_MASK                  _MK_MASK_CONST(0x10f)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_SHIFT                  _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_FIELD                  _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_RANGE                  8:8
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_WOFFSET                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_REQUEST_COUNT                  _MK_ENUM_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_MEM_ACT_MODE_TRANSFER_COUNT                 _MK_ENUM_CONST(0)

#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_SHIFT                       _MK_SHIFT_CONST(3)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_RANGE                       3:3
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_WR_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_SHIFT                       _MK_SHIFT_CONST(2)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_RANGE                       2:2
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ADAST_RD_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_SHIFT                       _MK_SHIFT_CONST(1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_RANGE                       1:1
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_WR_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_RANGE                       0:0
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_2_ACAST_RD_ACT_EN_ENABLE                      _MK_ENUM_CONST(1)


// Register AMISC_ACTMON_ADSP_PMU_0
#define AMISC_ACTMON_ADSP_PMU_0                 _MK_ADDR_CONST(0x118)
#define AMISC_ACTMON_ADSP_PMU_0_SECURE                  0x0
#define AMISC_ACTMON_ADSP_PMU_0_DUAL                    0x0
#define AMISC_ACTMON_ADSP_PMU_0_SCR                     0
#define AMISC_ACTMON_ADSP_PMU_0_WORD_COUNT                      0x1
#define AMISC_ACTMON_ADSP_PMU_0_RESET_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_RESET_MASK                      _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_0_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_READ_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_0_WRITE_MASK                      _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_FIELD                    _MK_FIELD_CONST(0x3, AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_SHIFT)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_RANGE                    1:0
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_WOFFSET                  0x0
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_DEFAULT_MASK                     _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_DISABLED                 _MK_ENUM_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_INSTR_STALL                      _MK_ENUM_CONST(1)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_DATA_STALL                       _MK_ENUM_CONST(2)
#define AMISC_ACTMON_ADSP_PMU_0_ADSP_STALL_SEL_INSTR_DATA_STALL                 _MK_ENUM_CONST(3)


// Register AMISC_ACTMON_ADSP_PMU
#define AMISC_ACTMON_ADSP_PMU                   _MK_ADDR_CONST(0x118)
#define AMISC_ACTMON_ADSP_PMU_SECURE                    0x0
#define AMISC_ACTMON_ADSP_PMU_DUAL                      0x0
#define AMISC_ACTMON_ADSP_PMU_SCR                       0
#define AMISC_ACTMON_ADSP_PMU_WORD_COUNT                        0x1
#define AMISC_ACTMON_ADSP_PMU_RESET_VAL                         _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_RESET_MASK                        _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_SW_DEFAULT_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_READ_MASK                         _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_WRITE_MASK                        _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_SHIFT                      _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_FIELD                      _MK_FIELD_CONST(0x3, AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_SHIFT)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_RANGE                      1:0
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_WOFFSET                    0x0
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_DEFAULT_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_SW_DEFAULT                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_SW_DEFAULT_MASK                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_PARITY_PROTECTION                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_PLATFORM_DEPENDENT                 _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_DISABLED                   _MK_ENUM_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_INSTR_STALL                        _MK_ENUM_CONST(1)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_DATA_STALL                 _MK_ENUM_CONST(2)
#define AMISC_ACTMON_ADSP_PMU_ADSP_STALL_SEL_INSTR_DATA_STALL                   _MK_ENUM_CONST(3)


// Register AMISC_ACTMON_ADSP_PMU_1
#define AMISC_ACTMON_ADSP_PMU_1                 _MK_ADDR_CONST(0x11c)
#define AMISC_ACTMON_ADSP_PMU_1_SECURE                  0x0
#define AMISC_ACTMON_ADSP_PMU_1_DUAL                    0x0
#define AMISC_ACTMON_ADSP_PMU_1_SCR                     0
#define AMISC_ACTMON_ADSP_PMU_1_WORD_COUNT                      0x1
#define AMISC_ACTMON_ADSP_PMU_1_RESET_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_RESET_MASK                      _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_1_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_READ_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_1_WRITE_MASK                      _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_FIELD                    _MK_FIELD_CONST(0x3, AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_SHIFT)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_RANGE                    1:0
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_WOFFSET                  0x0
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_DEFAULT_MASK                     _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_DISABLED                 _MK_ENUM_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_INSTR_STALL                      _MK_ENUM_CONST(1)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_DATA_STALL                       _MK_ENUM_CONST(2)
#define AMISC_ACTMON_ADSP_PMU_1_ADSP_STALL_SEL_INSTR_DATA_STALL                 _MK_ENUM_CONST(3)


// Register AMISC_ACTMON_ADSP_PMU_2
#define AMISC_ACTMON_ADSP_PMU_2                 _MK_ADDR_CONST(0x120)
#define AMISC_ACTMON_ADSP_PMU_2_SECURE                  0x0
#define AMISC_ACTMON_ADSP_PMU_2_DUAL                    0x0
#define AMISC_ACTMON_ADSP_PMU_2_SCR                     0
#define AMISC_ACTMON_ADSP_PMU_2_WORD_COUNT                      0x1
#define AMISC_ACTMON_ADSP_PMU_2_RESET_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_RESET_MASK                      _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_2_SW_DEFAULT_VAL                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_SW_DEFAULT_MASK                         _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_READ_MASK                       _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_2_WRITE_MASK                      _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_SHIFT                    _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_FIELD                    _MK_FIELD_CONST(0x3, AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_SHIFT)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_RANGE                    1:0
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_WOFFSET                  0x0
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_DEFAULT_MASK                     _MK_MASK_CONST(0x3)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_SW_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_SW_DEFAULT_MASK                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_PARITY_PROTECTION                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_PLATFORM_DEPENDENT                       _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_DISABLED                 _MK_ENUM_CONST(0)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_INSTR_STALL                      _MK_ENUM_CONST(1)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_DATA_STALL                       _MK_ENUM_CONST(2)
#define AMISC_ACTMON_ADSP_PMU_2_ADSP_STALL_SEL_INSTR_DATA_STALL                 _MK_ENUM_CONST(3)


// Register AMISC_ACTMON_REQ_THRSHOLD_0
#define AMISC_ACTMON_REQ_THRSHOLD_0                     _MK_ADDR_CONST(0x124)
#define AMISC_ACTMON_REQ_THRSHOLD_0_SECURE                      0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_DUAL                        0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_SCR                         0
#define AMISC_ACTMON_REQ_THRSHOLD_0_WORD_COUNT                  0x1
#define AMISC_ACTMON_REQ_THRSHOLD_0_RESET_VAL                   _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_0_RESET_MASK                  _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_READ_MASK                   _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_0_WRITE_MASK                  _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_SHIFT                       _MK_SHIFT_CONST(11)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_RANGE                       11:11
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_RD_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_SHIFT                       _MK_SHIFT_CONST(10)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_RANGE                       10:10
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ADAST_WR_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_SHIFT                       _MK_SHIFT_CONST(9)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_RANGE                       9:9
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_WR_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_SHIFT                       _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_RANGE                       8:8
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_ACAST_RD_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_FIELD                     _MK_FIELD_CONST(0x7f, AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_RANGE                     6:0
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_WOFFSET                   0x0
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_DEFAULT                   _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_DEFAULT_MASK                      _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_0_REQ_THRSHLD_LEVEL_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_REQ_THRSHOLD
#define AMISC_ACTMON_REQ_THRSHOLD                       _MK_ADDR_CONST(0x124)
#define AMISC_ACTMON_REQ_THRSHOLD_SECURE                        0x0
#define AMISC_ACTMON_REQ_THRSHOLD_DUAL                  0x0
#define AMISC_ACTMON_REQ_THRSHOLD_SCR                   0
#define AMISC_ACTMON_REQ_THRSHOLD_WORD_COUNT                    0x1
#define AMISC_ACTMON_REQ_THRSHOLD_RESET_VAL                     _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_RESET_MASK                    _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_READ_MASK                     _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_WRITE_MASK                    _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_SHIFT                 _MK_SHIFT_CONST(11)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_RANGE                 11:11
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_WOFFSET                       0x0
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_RD_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_SHIFT                 _MK_SHIFT_CONST(10)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_RANGE                 10:10
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_WOFFSET                       0x0
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ADAST_WR_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_SHIFT                 _MK_SHIFT_CONST(9)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_RANGE                 9:9
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_WOFFSET                       0x0
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_WR_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_SHIFT                 _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_RANGE                 8:8
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_WOFFSET                       0x0
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_ACAST_RD_EN_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_FIELD                       _MK_FIELD_CONST(0x7f, AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_RANGE                       6:0
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_DEFAULT                     _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_DEFAULT_MASK                        _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_REQ_THRSHLD_LEVEL_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_REQ_THRSHOLD_1
#define AMISC_ACTMON_REQ_THRSHOLD_1                     _MK_ADDR_CONST(0x128)
#define AMISC_ACTMON_REQ_THRSHOLD_1_SECURE                      0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_DUAL                        0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_SCR                         0
#define AMISC_ACTMON_REQ_THRSHOLD_1_WORD_COUNT                  0x1
#define AMISC_ACTMON_REQ_THRSHOLD_1_RESET_VAL                   _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_1_RESET_MASK                  _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_1_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_READ_MASK                   _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_1_WRITE_MASK                  _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_SHIFT                       _MK_SHIFT_CONST(11)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_RANGE                       11:11
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_RD_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_SHIFT                       _MK_SHIFT_CONST(10)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_RANGE                       10:10
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ADAST_WR_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_SHIFT                       _MK_SHIFT_CONST(9)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_RANGE                       9:9
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_WR_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_SHIFT                       _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_RANGE                       8:8
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_ACAST_RD_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_FIELD                     _MK_FIELD_CONST(0x7f, AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_RANGE                     6:0
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_WOFFSET                   0x0
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_DEFAULT                   _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_DEFAULT_MASK                      _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_1_REQ_THRSHLD_LEVEL_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_REQ_THRSHOLD_2
#define AMISC_ACTMON_REQ_THRSHOLD_2                     _MK_ADDR_CONST(0x12c)
#define AMISC_ACTMON_REQ_THRSHOLD_2_SECURE                      0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_DUAL                        0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_SCR                         0
#define AMISC_ACTMON_REQ_THRSHOLD_2_WORD_COUNT                  0x1
#define AMISC_ACTMON_REQ_THRSHOLD_2_RESET_VAL                   _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_2_RESET_MASK                  _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_2_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_READ_MASK                   _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_2_WRITE_MASK                  _MK_MASK_CONST(0xf7f)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_SHIFT                       _MK_SHIFT_CONST(11)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_RANGE                       11:11
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_RD_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_SHIFT                       _MK_SHIFT_CONST(10)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_RANGE                       10:10
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ADAST_WR_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_SHIFT                       _MK_SHIFT_CONST(9)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_RANGE                       9:9
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_WR_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_SHIFT                       _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_FIELD                       _MK_FIELD_CONST(0x1, AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_RANGE                       8:8
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_WOFFSET                     0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_DEFAULT_MASK                        _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_DISABLE                     _MK_ENUM_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_ACAST_RD_EN_ENABLE                      _MK_ENUM_CONST(1)

#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_SHIFT                     _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_FIELD                     _MK_FIELD_CONST(0x7f, AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_SHIFT)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_RANGE                     6:0
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_WOFFSET                   0x0
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_DEFAULT                   _MK_MASK_CONST(0xf)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_DEFAULT_MASK                      _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_SW_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_SW_DEFAULT_MASK                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_PARITY_PROTECTION                 _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_REQ_THRSHOLD_2_REQ_THRSHLD_LEVEL_PLATFORM_DEPENDENT                        _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0                     _MK_ADDR_CONST(0x130)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_SECURE                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_DUAL                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_SCR                         0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_WORD_COUNT                  0x1
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_RESET_MASK                  _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_READ_MASK                   _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_WRITE_MASK                  _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_SHIFT                        _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_FIELD                        _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_RANGE                        8:8
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_WOFFSET                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_DISABLE                      _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_ENABLE_ENABLE                       _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_FIELD                       _MK_FIELD_CONST(0x7f, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_RANGE                       6:0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_DEFAULT_MASK                        _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0_PULSE_N_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_MEM_ACTIVITY_PULSE_N
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N                       _MK_ADDR_CONST(0x130)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_SECURE                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_DUAL                  0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_SCR                   0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_WORD_COUNT                    0x1
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_RESET_VAL                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_RESET_MASK                    _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_SW_DEFAULT_VAL                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_READ_MASK                     _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_WRITE_MASK                    _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_SHIFT                  _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_FIELD                  _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_RANGE                  8:8
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_WOFFSET                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_DEFAULT                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_DEFAULT_MASK                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_SW_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_SW_DEFAULT_MASK                        _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_PARITY_PROTECTION                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_PLATFORM_DEPENDENT                     _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_DISABLE                        _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_ENABLE_ENABLE                 _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_SHIFT                 _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_FIELD                 _MK_FIELD_CONST(0x7f, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_RANGE                 6:0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_WOFFSET                       0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_DEFAULT_MASK                  _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_PULSE_N_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1                     _MK_ADDR_CONST(0x134)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_SECURE                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_DUAL                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_SCR                         0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_WORD_COUNT                  0x1
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_RESET_MASK                  _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_READ_MASK                   _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_WRITE_MASK                  _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_SHIFT                        _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_FIELD                        _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_RANGE                        8:8
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_WOFFSET                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_DISABLE                      _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_ENABLE_ENABLE                       _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_FIELD                       _MK_FIELD_CONST(0x7f, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_RANGE                       6:0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_DEFAULT_MASK                        _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1_PULSE_N_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2                     _MK_ADDR_CONST(0x138)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_SECURE                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_DUAL                        0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_SCR                         0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_WORD_COUNT                  0x1
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_RESET_VAL                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_RESET_MASK                  _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_SW_DEFAULT_VAL                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_READ_MASK                   _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_WRITE_MASK                  _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_SHIFT                        _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_FIELD                        _MK_FIELD_CONST(0x1, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_RANGE                        8:8
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_WOFFSET                      0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_DEFAULT_MASK                 _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_DISABLE                      _MK_ENUM_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_ENABLE_ENABLE                       _MK_ENUM_CONST(1)

#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_SHIFT                       _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_FIELD                       _MK_FIELD_CONST(0x7f, AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_SHIFT)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_RANGE                       6:0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_WOFFSET                     0x0
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_DEFAULT                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_DEFAULT_MASK                        _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_SW_DEFAULT                  _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_SW_DEFAULT_MASK                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_PARITY_PROTECTION                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2_PULSE_N_PLATFORM_DEPENDENT                  _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_COMMON_ADSP_PULSE_N_0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0                      _MK_ADDR_CONST(0x13c)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_SECURE                       0x0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_DUAL                         0x0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_SCR                  0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_WORD_COUNT                   0x1
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_RESET_MASK                   _MK_MASK_CONST(0x1ff)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_READ_MASK                    _MK_MASK_CONST(0x1ff)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_WRITE_MASK                   _MK_MASK_CONST(0x1ff)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_SHIFT                 _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_SHIFT)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_RANGE                 8:8
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_WOFFSET                       0x0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_ENABLE_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_FIELD                        _MK_FIELD_CONST(0xff, AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_SHIFT)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_RANGE                        7:0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_WOFFSET                      0x0
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_DEFAULT_MASK                 _MK_MASK_CONST(0xff)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_ADSP_PULSE_N_0_PULSE_N_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


// Register AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0                      _MK_ADDR_CONST(0x140)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_SECURE                       0x0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_DUAL                         0x0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_SCR                  0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_WORD_COUNT                   0x1
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_RESET_VAL                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_RESET_MASK                   _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_SW_DEFAULT_VAL                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_READ_MASK                    _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_WRITE_MASK                   _MK_MASK_CONST(0x17f)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_SHIFT                 _MK_SHIFT_CONST(8)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_FIELD                 _MK_FIELD_CONST(0x1, AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_SHIFT)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_RANGE                 8:8
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_WOFFSET                       0x0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_DEFAULT                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_DEFAULT_MASK                  _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_SW_DEFAULT                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_SW_DEFAULT_MASK                       _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_PARITY_PROTECTION                     _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_PLATFORM_DEPENDENT                    _MK_MASK_CONST(0x1)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_DISABLE                       _MK_ENUM_CONST(0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_ENABLE_ENABLE                        _MK_ENUM_CONST(1)

#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_SHIFT                        _MK_SHIFT_CONST(0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_FIELD                        _MK_FIELD_CONST(0x7f, AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_SHIFT)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_RANGE                        6:0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_WOFFSET                      0x0
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_DEFAULT                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_DEFAULT_MASK                 _MK_MASK_CONST(0x7f)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_SW_DEFAULT                   _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_SW_DEFAULT_MASK                      _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_PARITY_PROTECTION                    _MK_MASK_CONST(0x0)
#define AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0_PULSE_N_PLATFORM_DEPENDENT                   _MK_MASK_CONST(0x1)


//
// REGISTER LIST
//
#define LIST_ARAMISC_REGS(_op_) \
_op_(AMISC_AMISC_CONFIG_0) \
_op_(AMISC_ADSP_CONFIG_0) \
_op_(AMISC_ADSP_PERIPHBASE_0) \
_op_(AMISC_ADSP_L2_CONFIG_0) \
_op_(AMISC_ADSP_L2_REGFILEBASE_0) \
_op_(AMISC_ADSP_STATUS_0) \
_op_(AMISC_ADSP_AGIC_CONFIG_0) \
_op_(AMISC_CONFIG_LOCK_0) \
_op_(AMISC_TSC_LOW_0) \
_op_(AMISC_TSC_HIGH_0) \
_op_(AMISC_IDLE_0) \
_op_(AMISC_ACTMON_0) \
_op_(AMISC_MC_STATS_READ_0) \
_op_(AMISC_MC_STATS_READ) \
_op_(AMISC_MC_STATS_READ_1) \
_op_(AMISC_MC_STATS_WRITE_0) \
_op_(AMISC_MC_STATS_WRITE) \
_op_(AMISC_MC_STATS_WRITE_1) \
_op_(AMISC_MC_STATS_CLEAR_0) \
_op_(AMISC_MC_STATS_CLEAR) \
_op_(AMISC_MC_STATS_CLEAR_1) \
_op_(AMISC_KEYSLOT_NS_0) \
_op_(AMISC_KEYSLOT_KEY0_0) \
_op_(AMISC_KEYSLOT_KEY0) \
_op_(AMISC_KEYSLOT_KEY0_1) \
_op_(AMISC_KEYSLOT_KEY0_2) \
_op_(AMISC_KEYSLOT_KEY0_3) \
_op_(AMISC_KEYSLOT_KEY1_0) \
_op_(AMISC_KEYSLOT_KEY1) \
_op_(AMISC_KEYSLOT_KEY1_1) \
_op_(AMISC_KEYSLOT_KEY1_2) \
_op_(AMISC_KEYSLOT_KEY1_3) \
_op_(AMISC_KEYSLOT_KEY2_0) \
_op_(AMISC_KEYSLOT_KEY2) \
_op_(AMISC_KEYSLOT_KEY2_1) \
_op_(AMISC_KEYSLOT_KEY2_2) \
_op_(AMISC_KEYSLOT_KEY2_3) \
_op_(AMISC_KEYSLOT_KEY3_0) \
_op_(AMISC_KEYSLOT_KEY3) \
_op_(AMISC_KEYSLOT_KEY3_1) \
_op_(AMISC_KEYSLOT_KEY3_2) \
_op_(AMISC_KEYSLOT_KEY3_3) \
_op_(AMISC_APE_TSC_CTRL_0_0) \
_op_(AMISC_APE_TSC_CTRL_1_0) \
_op_(AMISC_APE_TSC_CTRL_2_0) \
_op_(AMISC_APE_TSC_CTRL_3_0) \
_op_(AMISC_APE_RT_TSC_NS_0) \
_op_(AMISC_APE_RT_TSC_SEC_0) \
_op_(AMISC_APE_SNAP_TSC_NS_0) \
_op_(AMISC_APE_SNAP_TSC_SEC_0) \
_op_(AMISC_EAVB_SNAP_TSC_NS_0) \
_op_(AMISC_EAVB_SNAP_TSC_SEC_0) \
_op_(AMISC_SPARE_0) \
_op_(AMISC_ACONNECT_CLOCK_GATING_DISABLE_0) \
_op_(AMISC_APE_SLCG_OVERRIDE_0) \
_op_(AMISC_ACTMON_INPUT_CONFIG_0) \
_op_(AMISC_ACTMON_INPUT_CONFIG) \
_op_(AMISC_ACTMON_INPUT_CONFIG_1) \
_op_(AMISC_ACTMON_INPUT_CONFIG_2) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_0) \
_op_(AMISC_ACTMON_MEM_ACTIVITY) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_1) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_2) \
_op_(AMISC_ACTMON_ADSP_PMU_0) \
_op_(AMISC_ACTMON_ADSP_PMU) \
_op_(AMISC_ACTMON_ADSP_PMU_1) \
_op_(AMISC_ACTMON_ADSP_PMU_2) \
_op_(AMISC_ACTMON_REQ_THRSHOLD_0) \
_op_(AMISC_ACTMON_REQ_THRSHOLD) \
_op_(AMISC_ACTMON_REQ_THRSHOLD_1) \
_op_(AMISC_ACTMON_REQ_THRSHOLD_2) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_0) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_PULSE_N) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_1) \
_op_(AMISC_ACTMON_MEM_ACTIVITY_PULSE_N_2) \
_op_(AMISC_ACTMON_COMMON_ADSP_PULSE_N_0) \
_op_(AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0)


//
// ADDRESS SPACES
//

#define BASE_ADDRESS_AMISC      0x00000000

//
// ARAMISC REGISTER BANKS
//

#define AMISC0_FIRST_REG 0x0000 // AMISC_AMISC_CONFIG_0
#define AMISC0_LAST_REG 0x001c // AMISC_CONFIG_LOCK_0
#define AMISC1_FIRST_REG 0x004c // AMISC_TSC_LOW_0
#define AMISC1_LAST_REG 0x0058 // AMISC_ACTMON_0
#define AMISC2_FIRST_REG 0x0060 // AMISC_MC_STATS_READ_0
#define AMISC2_LAST_REG 0x0074 // AMISC_MC_STATS_CLEAR_1
#define AMISC3_FIRST_REG 0x007c // AMISC_KEYSLOT_NS_0
#define AMISC3_LAST_REG 0x00f0 // AMISC_APE_SLCG_OVERRIDE_0
#define AMISC4_FIRST_REG 0x0100 // AMISC_ACTMON_INPUT_CONFIG_0
#define AMISC4_LAST_REG 0x0140 // AMISC_ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0

// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif

#endif // ifndef ___ARAMISC_H_INC_
